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參數(shù)資料
| 型號： | HM628128DLPI-7 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 1 M SRAM (128-kword X 8-bit) |
| 中文描述： | 1個M的SRAM（128 - KWord的× 8位） |
| 文件頁數(shù)： | 1/20頁 |
| 文件大小： | 124K |
| 代理商： | HM628128DLPI-7 |
HM628128D Series
1 M SRAM (128-kword
×
8-bit)
ADE-203-996 (Z)
Preliminary, Rev. 0.0
Jan. 20, 1999
Description
The Hitachi HM628128D Series is 1-Mbit static RAM organized 131,072-kword
×
8-bit. HM628128D
Series has realized higher density, higher performance and low power consumption by employing Hi-
CMOS process technology. The HM628128D Series offers low power standby power dissipation;
therefore, it is suitable for battery backup systems. It has package variations of standard 32-pin plastic DIP,
standard 32-pin plastic SOP and standard 32-pin plastic TSOPI.
Features
Single 5 V supply: 5 V
±
10%
Access time: 55 ns/70 ns (max)
Power dissipation
Active: 30 mW/MHz (typ)
Standby: 10
μ
W (typ)
Completely static memory.
No clock or timing strobe required
Equal access and cycle times
Common data input and output
Three state output
Directly TTL compatible all inputs
Battery backup operation
2 chip selection for battery backup
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HM628128DLFPI-7 | 1 M SRAM (128-kword X 8-bit) |
| HM628128 | 1 M SRAM (128-kword x 8-bit) |
| HM628128DLFP-5 | Replaced by SN54LS158 : Quadruple 2-Line To 1-Line Data Selectors/Multiplexers 16-CFP -55 to 125 |
| HM628128DLFP-5SL | Synchronous 4-Bit Counters 16-CDIP -55 to 125 |
| HM628128DLFP-5UL | 1 M SRAM (128-kword x 8-bit) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HM628128DLR-5 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:1 M SRAM (128-kword x 8-bit) |
| HM628128DLR-5SL | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:1 M SRAM (128-kword x 8-bit) |
| HM628128DLR-5UL | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:1 M SRAM (128-kword x 8-bit) |
| HM628128DLR-7 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:1 M SRAM (128-kword x 8-bit) |
| HM628128DLR-7SL | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:1 M SRAM (128-kword x 8-bit) |
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