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參數資料
型號: HM62W4100HJP-12
廠商: Hitachi,Ltd.
英文描述: 4M High Speed SRAM (1-Mword x 4-bit)
中文描述: 4分高速SRAM(1 - Mword × 4位)
文件頁數: 1/13頁
文件大小: 73K
代理商: HM62W4100HJP-12
HM62W4100H Series
4M High Speed SRAM (1-Mword
×
4-bit)
ADE-203-774D (Z)
Rev. 1.0
Sep. 15, 1998
Description
The HM62W4100H is a 4-Mbit high speed static RAM organized 1-Mword
×
4-bit. It has realized high
speed access time by employing CMOS process (4-transistor + 2-poly resistor memory cell) and high speed
circuit designing technology. It is most appropriate for the application which requires high speed and high
density memory, such as cache and buffer memory in system. The HM62W4100H is packaged in 400-mil
32-pin SOJ for high density surface mounting.
Features
Single supply : 3.3 V
±
0.3 V
Access time 12/15 ns (max)
Completely static memory
No clock or timing strobe required
Equal access and cycle times
Directly TTL compatible
All inputs and outputs
Operating current : 180/160 mA (max)
TTL standby current : 60/50 mA (max)
CMOS standby current : 5 mA (max)
: 1 mA (max) (L-version)
Data retension current : 0.6 mA (max) (L-version)
Data retension voltage: 2 V (min) (L-version)
Center V
CC
and V
SS
type pinout
相關PDF資料
PDF描述
HM62W4100HJP-15 4M High Speed SRAM (1-Mword x 4-bit)
HM62W4100HLJP-12 4M High Speed SRAM (1-Mword x 4-bit)
HM62W4100HLJP-15 4M High Speed SRAM (1-Mword x 4-bit)
HM62W4100H 4M High Speed SRAM (1-Mword ×4-bit)(4M高速靜態RAM(1M字×4位))
HM62W8511HJP-12 4M High Speed SRAM (512-kword x 8-bit)
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