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參數(shù)資料
| 型號： | HMU17GC-35 |
| 廠商： | INTERSIL CORP |
| 元件分類： | 數(shù)字信號處理外設(shè) |
| 英文描述： | 16 x 16-Bit CMOS Parallel Multipliers |
| 中文描述： | 16-BIT, DSP-MULTIPLIER, CPGA68 |
| 封裝： | CERAMIC, PGA-68 |
| 文件頁數(shù)： | 9/13頁 |
| 文件大小： | 225K |
| 代理商： | HMU17GC-35 |
9
Absolute Maximum Ratings
Thermal Information
Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +8.0V
Input, Output or I/O Voltage Applied . . . . . GND 0.5V to V
CC
+0.5V
Storage Temperature Range . . . . . . . . . . . . . . . . . . . 65
o
C to 150
o
C
Operating Conditions
Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . .+4.75V to +5.25V
Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . . . . 0
o
C to 70
o
C
Thermal Resistance (Typical, Note 1)
PLCC . . . . . . . . . . . . . . . . . . . . . . . . . .
CPGA. . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Package Power Dissipation at 70
o
C
PLCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.7W
CPGA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.46
Maximum Junction Temperature
PLCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .150
o
C
CPGA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .175
o
C
Maximum Lead Temperature (Soldering, 10s). . . . . . . . . . . . .300
o
C
θ
JA
(
o
C/W)
43.2
42.69
θ
JC
(
o
C/W)
15.1
10.0
Die Characteristics
Gate Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4500 Gates
CAUTION: Stresses above those listed in the ``Absolute Maximum Ratings'' may cause permanent damage to the device. This is a stress only rating, and operation at
these or any other conditions above those indicated in the operations sections of this specification is not implied.
NOTE:
1.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
DC Electrical Specifications
V
CC
= 5.0V
±
5%, T
A
= 0
o
C to 70
o
C
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
MAX
UNITS
Logical One Input Voltage
V
IH
V
CC
= 5.25V
2.0
-
V
Logical Zero Input Voltage
V
IL
V
CC
= 4.75V
-
0.8
V
Output High Voltage
V
OH
I
OH
= 400mA, V
CC
= 4.75V
2.6
-
V
Output Low Voltage
V
OL
I
OL
= +4.0mA, V
CC
= 4.75V
-
0.4
V
Input Leakage Current
I
I
V
I
= V
CC
or GND, V
CC
= 5.25V
10
10
μ
A
Output or I/O Leakage Current
I
O
V
O
= V
CC
or GND, V
CC
= 5.25V
10
10
μ
A
Standby Power Supply Current
I
CCSB
V
I
= V
CC
or GND, V
CC
= 5.25V
Outputs Open
-
500
μ
A
Operating Power Supply Current
I
CCOP
V
I
= V
CC
or GND, V
CC
= 5.25V
f = 1MHz (Note 2)
-
7.0
mA
NOTE:
2. Operating Supply Current is proportional to frequency, Typical rating is 5mA/MHz.
Capacitance
T
A
= 25
o
C, Note 3
PARAMETER
SYMBOL
TEST CONDITIONS
TYPICAL
UNITS
Input Capacitance
C
IN
Frequency = 1MHz. All measurements
referenced to device ground.
15
pF
Output Capacitance
C
OUT
10
pF
I/O Capacitance
C
I/O
10
pF
NOTE:
3. Not tested, but characterized at initial design and at major process/design changes.
HMU16, HMU17
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