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參數資料
| 型號： | HS1-82C12RH-8 |
| 廠商： | INTERSIL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Radiation Hardened 8-Bit Input/Output Port |
| 中文描述： | 8 I/O, PIA-GENERAL PURPOSE, CDIP24 |
| 封裝： | METAL SEALED, SIDE BRAZED, CERAMIC, DIP-24 |
| 文件頁數： | 1/6頁 |
| 文件大小： | 76K |
| 代理商： | HS1-82C12RH-8 |
1
TM
File Number
3041.3
HS-82C12RH
Radiation Hardened 8-Bit Input/Output
Port
The Intersil HS-82C12RH is a radiation hardened 8-bit
input/output port designed for use with the HS-80C85RH
radiation hardened microprocessor. It is manufactured using
a self-aligned, junction-isolated EPI-CMOS process and
features three-state output buffers and device selection and
control logic. A service request flip-flop is included for the
generation and control of interrupts to the microprocessor.
The device can be used in implement many of the peripheral
and input/output functions of a microcomputer system. The
HS-82C12RH is pinout- and function- compatible with
industry-standard 8212 devices.
Specifications for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers listed here must be used when ordering.
Detailed Electrical Specifications for these devices are
contained in SMD 5962-95818. A “hot-link” is provided
on our homepage for downloading.
www.intersil.com/spacedefense/space.asp
Features
Electrically Screened to SMD # 5962-95818
QML Qualified per MIL-PRF-38535 Requirements
Radiation Performance
- Hardened EPI-CMOS Process
- Total Dose. . . . . . . . . . . . . . . . . . . . .100 krad(Si) (Max)
- Transient Upset. . . . . . . . . . . . . . . . . > 1 x 10
8
rad(Si)/s
- Latch-Up Immune
Low Power Dissipation
High Noise Immunity
Single Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . +5V
Low Input Load Current
8-Bit Data Register and Buffer
Asynchronous Register Clear
Service Request Flip-Flop for Interrupt Generation
Three-State Outputs
Bus-Compatible with HS-80C85RH CPU
Electrically Equivalent to Sandia SA3026
Military Temperature Range. . . . . . . . . . . -55
o
C to 125
o
C
Functional Diagram
Ordering Information
ORDERING NUMBER
INTERNAL
MKT. NUMBER
TEMP. RANGE
(
o
C)
5962R9581801QJC
HS1-82C12RH-8
-55 to 125
5962R9581801QXC
HS9-82C12RH-8
-55 to 125
5962R9581801V9A
HS0-82C12RH-Q
25
5962R9581801VJC
HS1-82C12RH-Q
-55 to 125
5962R9581801VXC
HS9-82C12RH-Q
-55 to 125
Pin Description
PIN
DESCRIPTION
DI0-DI7
Data In
DO0-DO7
Data Out
DS1, DS2
Device Select
MD
Mode
STB
Strobe
INT
Interrupt
CLR
Clear
CONTROL
AND
DEVICE
SELECT
LOGIC
DATA
LATCH
AND
BUFFER
(8)
2
3
INT
DS2
STB
CLR
MD
DS1
SERVICE
REQUEST
F.F.
DI0-7
DO0-7
Data Sheet
August 2000
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|
Intersil and Design is a trademark of Intersil Corporation.
|
Copyright Intersil Corporation 2000
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