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參數(shù)資料
| 型號： | HS1B-2420RH-Q |
| 廠商： | INTERSIL CORP |
| 元件分類： | 運動控制電子 |
| 英文描述： | Radiation Hardened Fast Sample and Hold |
| 中文描述： | SAMPLE AND HOLD AMPLIFIER, CDIP14 |
| 封裝： | METAL SEALED, SIDE BRAZED, CERAMIC, DIP-14 |
| 文件頁數(shù)： | 2/8頁 |
| 文件大小： | 250K |
| 代理商： | HS1B-2420RH-Q |
2
Test Circuits
FIGURE 1. TEST FIXTURE SCHEMATIC (SWITCH POSITIONS S
1
- S
8
DETERMINE CONFIGURATION)
NOTE: Compute Hold Mode Feedthrough Attenuation from the
Formula:
FeedthroughAttenuation
20 log
=
Where V
OUT HOLD
= Peak-Peak Value of Output Sinewave during
the Hold Mode.
FIGURE 2. HOLD MODE FEEDTHROUGH ATTENUATION
NOTE: GBWP is the Frequency of V
INPUT
at which:
FIGURE 3. GAIN BANDWIDTH PRODUCT
DUT
-
+
A
S/H
-V
CC
+V
CC
CH =
1000pF
50
2
2
2
1
1
S
2
S
1
1
S
6
1
2
S
7
S
7
1
2
50
V
AC
AOUT
EOUT
50
1M
4
3
2
1
S
8
3
2
S
3
1
+V
CC
GND
50pF
2k
1
S
5
OPEN
3
2
S
4
1
100k
V
DC
10k
I
LOAD
NULL
AMP
X1
X-1
BUFFER
100k
ALL RESISTORS =
±
1%
ALL CAPACITORS =
±
10%
+
-
+
-
CH =
1000pF
V
OUT
50pF
2k
+15V
-15V
DUT
V
IN
OUT
A0
EN
IN2
IN1
IN3
IN4
IN5
IN6
IN7
IN8
A2
A1
SINEWAVE
INPUT
SAMPLE/HOLD
CONTROL INPUT
+5V
+
-
V
IN HOLD
-------------------------------
CH =
1000pF
V
OUT
50pF
2k
+15V
-15V
DUT
S/H
50
+
-
20 log
V
INPUT
--------------------
3dB
–
=
HS-2420RH
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