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參數資料
| 型號： | HS9-82C08RH |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | 通用總線功能 |
| 英文描述： | Radiation Hardened 8-Bit Bus Transceiver |
| 中文描述： | OCTAL LINE TRANSCEIVER, CDFP20 |
| 文件頁數： | 1/6頁 |
| 文件大小： | 44K |
| 代理商： | HS9-82C08RH |
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
|
Copyright
Intersil Corporation 1999
Ordering Information
PART NUMBER
TEMPERATURE RANGE
SCREENING LEVEL
PACKAGE
5962R9571401QRC
-55
o
C to +125
o
C
MIL-PRF-38535 Level Q
20 Lead SBDIP
5962R9571401QXC
-55
o
C to +125
o
C
MIL-PRF-38535 Level Q
20 Lead Ceramic Flatpack
5962R9571401VRC
-55
o
C to +125
o
C
MIL-PRF-38535 Level V
20 Lead SBDIP
5962R9571401VXC
-55
o
C to +125
o
C
MIL-PRF-38535 Level V
20 Lead Ceramic Flatpack
HS1-82C08RH/SAMPLE
+25
o
C
SAMPLE
20 Lead SBDIP
HS9-82C08RH/SAMPLE
+25
o
C
SAMPLE
20 Lead Ceramic Flatpack
HS-82C08RH
Radiation Hardened
8-Bit Bus Transceiver
Functional Diagram
TRUTH TABLE
INPUTS
OPERATION
OUTPUT
ENABLE
TRANSMIT
/RECEIVE
PORT A
PORT B
0
0
Out
In
0
1
In
Out
1
X
High Z
High Z
X = Don’t Care
A1
A2
A3
A4
A5
A6
A7
OE
PORT
A
A0
B1
B2
B3
B4
B5
B6
B7
PORT
B
B0
T/R
Features
Devices QML Qualified in Accordance With
MIL-PRF-38535
Detailed Electrical and Screening Requirements are
Contained in SMD# 5962-95714 and Intersil’ QM Plan
Radiation Hardened
- Total Dose 1 x 10
5
RAD (Si)
- Latch-Up Immune EPI-CMOS > 1 x 10
12
RAD (Si)/s
Bidirectional Three-State Input/Outputs
Low Propagation Delay Time
Low Power Consumption
Single Power Supply +5V
Electrically Equivalent to Sandia SA2997
Military Temperature Range -55
o
C to +125
o
C
Description
The Intersil HS-82C08RH is a radiation-hardened octal bus
transceiver with three-state outputs. It is manufactured using
a self-aligned, junction isolated CMOS process and is
designed for use with the HS-80C08RH radiation-hardened
microprocessor. The HS-82C08RH allows asynchronous
two-way communication between data buses. The direction
of data flow is determined by the logic level on the transmit/
receive (T/R) input. A logic high on the T/R input specifies
data flow from Port A to Port B of the device. Conversely, a
logic low on the T/R input specifies data flow from Port B to
Port A. The Output Enable input disables both ports by
placing them in the high impedance state.
The HS-82C08RH is ideally suited for a wide variety of
buffering applications in radiation-hardened microcomputer
systems.
February 1996
Spec Number
518057
File Number
3040.2
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相關代理商/技術參數 |
參數描述 |
|---|---|
| HS9-82C08RH-8 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened 8-Bit Bus Transceiver |
| HS9-82C08RH-Q | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened 8-Bit Bus Transceiver |
| HS9-82C12RH | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened 8-Bit Input/Output Port |
| HS9-82C12RH-8 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened 8-Bit Input/Output Port |
| HS9-82C12RH-Q | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened 8-Bit Input/Output Port |
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