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參數資料
| 型號： | HSP50110JC-52 |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | 通信及網絡 |
| 英文描述： | CONN HEADER HM 2MM 100POS |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQCC84 |
| 文件頁數： | 1/24頁 |
| 文件大小： | 199K |
| 代理商： | HSP50110JC-52 |
3-229
HSP50110
Digital Quadrature Tuner
The Digital Quadrature Tuner (DQT) provides many of the
functions required for digital demodulation. These functions
include carrier LO generation and mixing, baseband
sampling, programmable bandwidth filtering, baseband AGC,
and IF AGC error detection. Serial control inputs are provided
which can be used to interface with external symbol and
carrier tracking loops. These elements make the DQT ideal
for demodulator applications with multiple operational modes
or data rates. The DQT may be used with HSP50210 Digital
Costas Loop to function as a demodulator for BPSK, QPSK,
8-PSK OQPSK, FSK, FM, and AM signals.
The DQT processes a real or complex input digitized at rates
up to 52 MSPS. The channel of interest is shifted to DC by a
complex multiplication with the internal LO. The quadrature
LO is generated by a numerically controlled oscillator (NCO)
with a tuning resolution of 0.012Hz at a 52MHz sample rate.
The output of the complex multiplier is gain corrected and fed
into identical low pass FIR filters. Each filter is comprised of a
decimating low pass filter followed by an optional
compensation filter. The decimating low pass filter is a 3
stage Cascaded-Integrator-Comb (CIC) filter. The CIC filter
can be configured as an integrate and dump filter or a third
order CIC filter with a (sin(X)/X)
3
response. Compensation
filters are provided to flatten the (sin(X)/X)
N
response of the
CIC. If none of the filtering options are desired, they may be
bypassed. The filter bandwidth is set by the decimation rate of
the CIC filter. The decimation rate may be fixed or adjusted
dynamically by a symbol tracking loop to synchronize the
output samples to symbol boundaries. The decimation rate
may range from 1-4096. An internal AGC loop is provided to
maintain the output magnitude at a desired level. Also, an
input level detector can be used to supply error signal for an
external IF AGC loop closed around the A/D.
The DQT output is provided in either serial or parallel formats
to support interfacing with a variety DSP processors or digital
filter components. This device is configurable over a general
purpose 8-bit parallel bidirectional microprocessor control bus.
Features
Input Sample Rates to 52 MSPS
Internal AGC Loop for Output Level Stability
Parallel or Serial Output Data Formats
10-Bit Real or Complex Inputs
Bidirectional 8-Bit Microprocessor Interface
Frequency Selectivity <0.013Hz
Low Pass Filter Configurable as Three Stage Cascaded-
Integrator-Comb (CIC), Integrate and Dump, or Bypass
Fixed Decimation from 1-4096, or Adjusted by NCO
Synchronization with Baseband Waveforms
Input Level Detection for External IF AGC Loop
Designed to Operate with HSP50210 Digital Costas Loop
84 Lead PLCC
Applications
Satellite Receivers and Modems
Complex Upconversion/Modulation
Tuner for Digital Demodulators
Digital PLLs
Related Products: HSP50210 Digital Costas Loop;
A/D Products HI5703, HI5746, HI5766
HSP50110/210EVAL Digital Demod Evaluation Board
Block Diagram
Ordering Information
PART NUMBER
TEMP.
RANGE (
o
C)
PACKAGE
PKG. NO.
HSP50110JC-52
0 to 70
84 Ld PLCC
N84.1.15
HSP50110JI-52
-40 to 85
84 Ld PLCC
N84.1.15
LEVEL
DETECT
NCO
RE-SAMPLING
NCO
0
o
90
o
LOW PASS FIR
FILTER
DUMP
INTERFACE
PROGRAMMABLE
CONTROL
I DATA
Q DATA
CARRIER
TRACKING CONTROL
SAMPLE RATE
CONTROL
CONTROL/STATUS
10
10
SAMPLE STROBE
LOOP
FILTER
GCA
10
10
REAL OR COMPLEX
INPUT DATA
IF AGC
CONTROL
8
BUS
GCA
LOW PASS FIR
FILTER
LEVEL
DETECT
COMPLEX
MULTIPLIER
Data Sheet
January 1999
File Number
3651.4
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
|
Copyright
Intersil Corporation 1999
相關PDF資料 |
PDF描述 |
|---|---|
| HSP50110 | Digital Quadrature Tuner(數字調諧器) |
| HSP50210 | Digital Costas Loop(數字Costas鎖相環) |
| HSP50214VC | Programmable Downconverter |
| HSP50214VI | Programmable Downconverter |
| HSP50214 | Programmable Downconverter |
相關代理商/技術參數 |
參數描述 |
|---|---|
| HSP50110JC-52Z | 功能描述:調諧器 W/ANNEAL DIGTL TUNER 84 PLCC 52MHZ RoHS:否 制造商:NXP Semiconductors 功能: 噪聲系數: 工作電源電壓: 最小工作溫度: 最大工作溫度: |
| HSP50110JC-60 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Communications Tuner Circuit |
| HSP50110JI-52 | 功能描述:調諧器 DIGITAL QUADRATURE TUNER 84 PLCC,52MHZ,INDUSTRIAL RoHS:否 制造商:NXP Semiconductors 功能: 噪聲系數: 工作電源電壓: 最小工作溫度: 最大工作溫度: |
| HSP50110JI-52Z | 制造商:Intersil Corporation 功能描述:PB-FREE W/ANNEAL DIGITAL QUADRATURE TUNER 84 PLCC,52MHZ,INDU - Rail/Tube |
| HSP50210 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Digital Costas Loop |
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