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參數資料
| 型號： | HT48R05A-1 |
| 廠商： | Holtek Semiconductor Inc. |
| 英文描述： | 8-Bit High Performance RISC-like OTP Microcontroller(8位、高性能、類似RISC、一次可編程微控制器，用于多I/O接口設備) |
| 中文描述： | 8位高性能RISC樣檢察官辦公室的微控制器（8位，高性能，類似的RISC，一次可編程微控制器，用于多的I / O接口設備） |
| 文件頁數： | 19/44頁 |
| 文件大小： | 290K |
| 代理商： | HT48R05A-1 |
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HT48R05A-1
19
November 29, 2000
The PC0 and PC1 are pin-shared with INT,
TMR and pins respectively.
It is recommended that unused or not bonded
out I/O lines should be set as output pins by
software instruction to avoid consuming power
under input floating state.
ROM code option
The following table shows all kinds of ROM
code option in the microcontroller. All of the
ROM code options must be defined to ensure
proper system functioning.
Items
Option
1
WDT clock source: WDTOSC/f
TID
2
WDT enable/disable: enable/disable
3
LVD enable/disable: disable/enable
4
CLRWDT instruction(s):
one/two clear WDT instruction(s)
5
System oscillator: RC/crystal
6
Pull-high resistors (PA~PC):
none/pull-high
7
BZ option: disable/enable
8
PA0~PA7 wake-up: disable/enable
9
Lock: unlock/lock
PROM programming and verification
The
microcontroller is arranged into a 512 14 bits
programmemoryanda3 8bitsoptionmemory.
The program code and option code are stored in
the program and option memories. The pro-
gramming of memories can be summarized in
nine steps as described below:
program
memory
used
in
the
Power on (V
DD
=6.25V)
Set VPP (RES) to 12.5V
Set CS (PA5) to low
Let PA3~PA0 (AD3~AD0) be the address and
data bus and the PA4 (CLK) be the clock input.
The data on the AD3~AD0 pins will be clocked
into or out of the microcontroller on the falling
edge of PA4 (CLK) for OTP programming and
verification.
The address data contains the code address (11
bits) and two option bits. Acomplete write cycle
will contain four CLK cycles. The first cycle,
bits 0~3 of the address are latched into the
device. The second and third cycles, bits 4~7
and bits 8~9 are latched respectively. The
fourth cycle, bit 2 is the TSEL option bit and bit
3 is the OSEL option bit. Bits 2~3 in the third
cycle and bits 0~1 in the fourth cycle are unde-
fined. If the TSEL is "1" and the OSEL is "0",
the TEST memory will be read. If the TSEL is
"0" and the OSEL is "1", the option memory will
be accessed. If both the TSEL and OSEL are
"0", the program memory will be managed.
The code data is 14 bits wide. A complete
read/write cycle contains four CLK cycles. In
the first cycle, bits 0~3 of the code data are ac-
cessed. In the second and third, bits 4~7 and
bits 8~11 are accessed respectively. In the
fourth cycle, bits 12~13 are accessed. Bits
14~15 are undefined. During code verification,
reading will return the result "00".
Select the TSEL and OSEL to program and
verify the program memory and option
memory. Use the R/W (PA6) to select between
programming or verification.
The address is incremented by one automati-
cally after a code verification cycle. If the dis-
continued
address
verification is accomplished, the automatic ad-
dressing increment is disabled. For the discon-
tinued address programming and verification,
the CS pin must return to high level for a pro-
gramming or verification cycle, that is, if a dis-
continued
address
programming or verification cycle must be in-
terrupted and restarted as well.
programming
or
is
managed,
the
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相關代理商/技術參數 |
參數描述 |
|---|---|
| HT48R05A-1_08 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:Cost-Effective I/O Type 8-Bit MCU |
| HT48R062 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:Cost-Effective I/O Type 8-Bit MCU |
| HT48R062_08 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:Cost-Effective I/O Type 8-Bit MCU |
| HT48R063 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:Enhanced I/O Type 8-Bit OTP MCU |
| HT48R063_10 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:Enhanced I/O Type 8-Bit OTP MCU |
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