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參數資料
型號: HT48R10A
廠商: Holtek Semiconductor Inc.
元件分類: 8位微控制器
英文描述: 8-BIT MICROCONTROLLER
中文描述: 8位微控制器
文件頁數: 9/42頁
文件大小: 589K
代理商: HT48R10A
HT48R10A-1
Rev. 1.20
9
July 2, 2001
Accumulator
The accumulator is closely related to ALU oper-
ations. It is also mapped to location 05H of the
data memory and can carry out immediate data
operations. The data movement between two
data memory locations must pass through the
accumulator.
Arithmetic and logic unit
ALU
This circuit performs 8-bit arithmetic and logic
operations. The ALU provides the following func-
tions:
Arithmetic operations (ADD, ADC, SUB, SBC,
DAA)
Logic operations (AND, OR, XOR, CPL) Rota-
tion (RL, RR, RLC, RRC)
Increment and Decrement (INC, DEC)
Branch decision (SZ, SNZ, SIZ, SDZ ....)
The ALU not only saves the results of a data op-
eration but also changes the status register.
Status register
STATUS
This 8-bit register (0AH) contains the zero flag
(Z), carry flag (C), auxiliary carry flag (AC),
overflow flag (OV), power down flag (PD), and
watchdog time-out flag (TO). It also records the
status information and controls the operation
sequence.
With the exception of the TO and PD flags,
bits in the status register can be altered by
instructions like most other registers. Any
data written into the status register will not
change the TO or PD flag. In addition opera-
tions related to the status register may give
different results from those intended. The
TO flag can be affected only by system
power-up, a WDT time-out or executing the
"CLR WDT" or "HALT" instruction. The PD
flag can be affected only by executing the
"HALT" or "CLR WDT" instruction or a sys-
tem power-up.
The Z, OV, AC and C flags generally reflect the
status of the latest operations.
In addition, on entering the interrupt sequence
or executing the subroutine call, the status reg-
ister will not be pushed onto the stack automat-
ically. If the contents of the status are
important and if the subroutine can corrupt the
status register, precautions must be taken to
save it properly.
Interrupt
The device provides an external interrupt and
internal timer/event counter interrupts. The
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RAM mapping
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