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參數(shù)資料
| 型號： | HT5F128 |
| 廠商： | Holtek Semiconductor Inc. |
| 英文描述： | 0.8m CMOS High Speed Gate Array(0.8m CMOS高速門陣列) |
| 中文描述： | 0.8米的CMOS高速門陣列（0.8米的CMOS高速門陣列） |
| 文件頁數(shù)： | 2/4頁 |
| 文件大小： | 161K |
| 代理商： | HT5F128 |
HT5D
0.8 m CMOS High Speed Gate Array
Cell Libraries
Buffers
–
Inverting, noninverting, tri-state,
clock buffer
Input buffers
–
CMOS, CMOS Schmitt
–
TTL, TTL Schmitt
NAND/AND gates
NOR/OR gates
AOI/OAI gates
XNOR/XOR gates
D Flip-Flops
T Flip-Flops
Multiplexed Flip-Flops
JK Flip-Flops
Latches
–
with set, with clear, with set and clear,
NOR-latch, NAND-latch, scannable latch
Adders
–
1-bit full, 2-bit full
Adders/Subtractors
–
1-bit, 2-bit
Decoders
–
2-to-4, 3-to-8
Multiplexers
–
2-to-1, 4-to-1, 8-to-1
Synchronous counters
–
with clear, with clear and set
Miscellaneous
–
DLY, CLOAD1, MAXCAP, NETWTH,
RP01D1, WEIGHT
I/O Pad Libraries
Input pads
–
Input only, with pull-up/pull-down resistor
Clock input pads
–
Inverting/noninverting with CMOS level
–
Inverting/noninverting with Schmitt Trig-
ger
–
Inverting/noninverting with TTL level
Output pads
–
2mA, 4mA, 8mA, 12mA, 16mA, 20mA,
24mA, 30mA, 48mA driving capability
–
Output only, 3-state output, with
pull-up/pull-down resistor
–
CMOS level, TTL level
–
with limited slew rate control
I/O Pads
–
2mA, 4mA, 8mA, 12mA, 16mA, 20mA,
24mA, 30mA, 48mA driving capability
–
3-state output, with pull-up/pull-down re-
sistor
–
CMOS level, TTL level
–
with limited slew rate control
Power pads
–
Coreonly,paddingonly,coreandpadding
Crystal oscillator pads
–
Low frequency (1kHz~10MHz)
–
Intermediate frequency
(10MHz~25MHz)
–
High frequency (25MHz~60MHz)
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