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參數(shù)資料
型號: HT82J97E
廠商: Holtek Semiconductor Inc.
英文描述: USB Joystick Encoder 8-Bit OTP MCU
中文描述: USB搖桿編碼器8位微控制器檢察官辦公室
文件頁數(shù): 8/46頁
文件大小: 314K
代理商: HT82J97E
HT82J97E
Rev. 1.30
8
May 10, 2004
The TO flag can be affected only by a system power-up,
a WDT time-out or executing the CLR WDT or HALT
instruction. The PDF flag can be affected only by exe-
cuting the HALT or CLR WDT instruction or during a
system power-up.
The Z, OV, AC and C flags generally reflect the status of
the latest operations.
In addition, upon entering the interrupt sequence or exe-
cuting a subroutine call, the status register will not be
automatically pushed onto the stack. If the contents of
the status are important and if the subroutine can cor-
rupt the status register, precautions must be taken to
save it properly.
Interrupt
The device provides an external interrupt and internal
timer/event counter interrupts. The Interrupt Control
Register (INTC;0BH) contains the interrupt control bits
tosettheenable/disableandtheinterruptrequestflags.
Once an interrupt subroutine is serviced, all the other in-
terrupts will be blocked (by clearing the EMI bit). This
scheme may prevent any further interrupt nesting. Other
interrupt requests may occur during this interval but only
the interrupt request flag is recorded. If a certain inter-
rupt requires servicing within the service routine, the
EMI bit and the corresponding bit of the INTC may be
set to allow interrupt nesting. If the stack is full, the inter-
rupt request will not be acknowledged, even if the re-
lated interrupt is enabled, until the SP is decremented. If
immediate service is desired, the stack must be pre-
vented from becoming full.
All these kinds of interrupts have a wake-up capability.
As an interrupt is serviced, a control transfer occurs by
pushing the program counter onto the stack, followed by
a branch to a subroutine at a specified location in the
program memory. Only the program counter is pushed
onto the stack. If the contents of the register or status
register (STATUS) are altered by the interrupt service
program which corrupts the desired control sequence,
the contents should be saved in advance.
Register
Bit No.
Label
Function
INTC
(0BH)
0
EMI
Controls the master (global) interrupt (1=enable; 0=disable)
1
EUI
Controls the USB interrupt (1=enable; 0= disable)
2
Unused bit, read as 0
3
ETI
Controls the Timer/Event Counter interrupt (1=enable; 0=disable)
4
USBF
USB interrupt request flag (1=active; 0=inactive)
5
Unused bit, read as 0
6
TF
Internal timer/event counter request flag (1:active; 0:inactive)
7
Unused bit, read as 0
INTC Register
Labels
Bits
Function
C
0
C is set if an operation results in a carry during an addition operation or if a borrow does not
take place during a subtraction operation; otherwise C is cleared. C is also affected by a rotate
through carry instruction.
AC
1
ACissetifanoperationresultsinacarryoutofthelownibblesinadditionornoborrowfromthe
high nibble into the low nibble in subtraction; otherwise AC is cleared.
Z
2
Z is set if the result of an arithmetic or logic operation is zero; otherwise Z is cleared.
OV
3
OV is set if an operation results in a carry into the highest-order bit but not a carry out of the
highest-order bit, or vice versa; otherwise OV is cleared.
PDF
4
PDF is cleared by a system power-up or executing the CLR WDT instruction. PDF is set by
executing the HALT instruction.
TO
5
TO is cleared by a system power-up or executing the CLR WDT or HALT instruction. TO is
set by a WDT time-out.
6
Unused bit, read as 0
7
Unused bit, read as 0
Status Register
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