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參數(shù)資料
型號(hào): HT82K68A
廠商: Holtek Semiconductor Inc.
英文描述: 8-Bit High Performance Peripheral Interface IC For Multiple I/O Products and Multimedia Applications(8位高性能外圍接口集成芯片,用于多I/O口及多媒體器件)
中文描述: 8位高性能外圍接口芯片為多個(gè)I / O產(chǎn)品和多媒體應(yīng)用(8位高性能外圍接口集成芯片,用于多的I / O口及多媒體器件)
文件頁(yè)數(shù): 12/40頁(yè)
文件大小: 255K
代理商: HT82K68A
HT82K68A
12
December 8, 2000
will be serviced on the latter of the two T2
pulses, if the corresponding interrupts are en-
abled. In the case of simultaneous requests, the
following table shows the priority that is ap-
plied. These can be masked by resetting the
EMI bit.
No.
Interrupt Source
Vector
a
Timer counter overflow
08H
The timer counter interrupt request flag (T0F),
enable timer counter bit (ET0I), and enable
master interrupt bit (EMI) constitute an inter-
rupt control register (INTC) which is located at
0BH in the data memory. EMI, ET0I, are used
to control the enabling/disabling of interrupts.
These bits prevent the requested interrupt
from being serviced. Once the interrupt request
flags (T0F) are set, they will remain in the
INTC register until the interrupts are serviced
or cleared by a software instruction.
It is suggested that a program does not use the
CALL subroutine within the interrupt sub-
routine. Because interrupts often occur in an un-
predictable manner or need to be serviced
immediately in some applications, if only one
stack is left and enabling the interrupt is not well
controlled, once the CALL subroutine operates in
the interrupt subroutine it will damage the original
control sequence.
Oscillator configuration
There are two oscillator circuits in HT82K68A.
Both are designed for system clocks; the RC os-
cillator and the Crystal oscillator, which are de-
termined by mask options. No matter what
oscillator type is selected, the signal provides
the system clock. The HALT mode stops the
systemoscillatorandresiststheexternalsignal
to conserve power.
Register
Bit No.
Label
Function
INTC
(0BH)
0
EMI
Controls the master (global) interrupt
(1= enabled; 0= disabled)
1
Undefined, read as "0"; programming must be "0"
2
ET0I
Controls the timer counter interrupt
(1= enabled; 0= disabled)
3
Undefined, read as "0"
4
Undefined, read as "0"; programming must be "0"
5
T0F
Internal timer counter request flag
(1= active; 0= inactive)
6
Undefined, read as "0"
7
Unused bit, read as "0"
INTC register
Crystal Oscillator
RC Oscillator
OSC1
OSC2
OSC1
OSC2
V
DD
f
SYS
/4
(NMOS Open
Drain Output)
System oscillator
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