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參數(shù)資料
型號(hào): HT8955A
廠商: Holtek Semiconductor Inc.
英文描述: Voice Echo
中文描述: 語(yǔ)音回聲
文件頁(yè)數(shù): 4/7頁(yè)
文件大小: 589K
代理商: HT8955A
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
DD
Conditions
V
IH
“H” Input Voltage
0.7V
DD
V
DD
V
V
OMAX
Maximum Output Voltage
5V
R
L
>470k
1
1.5
V
Td
Maximum Delay Time
5V
SE L=open, 25kHz
sampling rate
0.15
0.2
s
Td
5V
SE L=VSS, 25kHz
sampling rate
0.6
0.8
s
S/N
Signal to Noise Ratio
5V
V
O
=1V, 400Hz
BW=10kHz
55
dB
THD
Total Harmonic Distortion
5V
V
O
=1V, 400Hz
BW=7kHz
0.5
%
Functional Description
The HT8955A is a single chip LSI with an exter-
nal DRAM. It is designed for processing audio
signal delay. The chip includes a built-in pre-
amplifier, 10-bit A/D and D/A converters. The
A/D and D/A converters ensure low distortion as
well as high S/N ratio of the audio delay system.
The chip also provides two sets of oscillation
circuit for system sampling rate and audio echo
delay time.
Playing function block diagram
System oscillator
The HT8955A provides two oscillators, one for
the sampling rate and one for echo delay time.
The sampling rate oscillator requires an exter-
nal resistor between the OSC1 and OSC2 pins.
A higher sampling rate (25~50kHz) can thus be
derived by adjusting the oscillation resistor
without having a sophisticated low pass filter.
The delay time oscillator, on the other hand,
demands an external resistor between the
OSC3 and OSC4 pins. By altering the oscilla-
tion resistor, its delay time can be continuously
adjusted up to 0.8/0.2 seconds at a 25kHz sam-
pling rate for DRAM of 256K b/64K b.
DRAM selection
The HT8955A can interface with a DRAM for
storing delay signals. The type along with the
maximum delay time of DRAM is determined
by the status of the SE L pin as shown:
SE L Connection
DR AM
Type
Delay Time
VDD or Open
64K b
0.2 seconds
VSS
256Kb
0.8 seconds
HT8955A
4
5th May ’98
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