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參數資料
| 型號： | HV51V7403HGL-7 |
| 廠商： | Hynix Semiconductor Inc. |
| 英文描述： | L260Ap, syringe (use with DGG-50) |
| 中文描述： | 4米× 4位EDO公司的DRAM |
| 文件頁數： | 7/11頁 |
| 文件大小： | 96K |
| 代理商： | HV51V7403HGL-7 |
HY51V(S)17403HG/HGL
Rev.0.1/Apr.01
7
Write Cycle
Read-Modify-Write Cycle
Refresh cycle
Parameter
Symbol
-50
-60
-70
Unit
Note
Min
Max
Min
Max
Min
Max
Write command set-up time
tWCS
0
-
0
-
0
-
ns
14
Write command hold time
t
WCH
8
-
10
-
13
-
ns
Write command pulse width
tWP
8
-
10
-
10
-
ns
Write command to /RAS lead time
t
RWL
8
-
10
-
13
-
ns
Write command to /CAS lead time
t
CWL
8
-
10
-
13
-
ns
Data-in set-up time
tDS
0
-
0
-
0
-
ns
15
Data-in hold time
tDH
8
-
10
-
13
-
ns
15
Parameter
Symbol
-50
-60
-70
Unit
Note
Min
Max
Min
Max
Min
Max
Read-modify-write cycle time
tRWC
111
-
136
-
161
-
ns
/RAS to /WE delay time
t
RWD
67
-
79
-
92
-
ns
14
/CAS to /WE delay time
tCWD
30
-
34
-
40
-
ns
14
Column address to /WE delay time
t
AWD
42
-
49
-
57
-
ns
14
/OE hold time from /WE
t
OEH
13
-
15
-
18
-
ns
Parameter
Symbol
-50
-60
-70
Unit
Note
Min
Max
Min
Max
Min
Max
/CAS set-up time
( /CAS-before-/RAS Refresh Cycle)
tCSR
5
-
5
-
5
-
ns
/CAS hold time
( /CAS-before-/RAS Refresh Cycle)
t
CHR
8
-
10
-
10
-
ns
/WE setup time
( /CAS-before-/RAS Refresh Cycle)
t
WRP
0
-
0
-
0
-
ns
/WE hold time
( /CAS-before-/RAS Refresh Cycle)
t
WRH
10
-
10
-
10
-
ns
/RAS precharge to /CAS hold time
( /CAS-before-/RAS Refresh Cycle)
t
RPC
5
-
5
-
5
-
ns
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