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參數(shù)資料
型號： HW-V5-ML523-UNI-G-J
廠商： Xilinx Inc
文件頁數(shù)： 1/91頁
文件大小： 0K
描述： EVALUATION PLATFORM VIRTEX-5
產(chǎn)品變化通告： Development Systems Discontinuation 16/Jan/2012
標(biāo)準(zhǔn)包裝： 1
系列： Virtex®-5 FXT/LXT
類型： FPGA
適用于相關(guān)產(chǎn)品： XC5VLX110T-FF1136
所含物品： ML52x 平臺，線纜，小型閃存卡，文檔 - 不包括電源 -
DS202 (v5.3) May 5, 2010
Product Specification
1
2006–2010 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and other
countries. PowerPC is a trademark of IBM Corp. and is used under license. PCI, PCI Express, PCIe, and PCI-X are trademarks of PCI-SIG. All other trademarks are the property
of their respective owners.
Virtex-5 FPGA Electrical Characteristics
Virtex-5 FPGAs are available in -3, -2, -1 speed grades,
with -3 having the highest performance. Virtex-5 FPGA DC
and AC characteristics are specified for both commercial
and industrial grades. Except the operating temperature
range or unless otherwise noted, all the DC and AC
electrical parameters are the same for a particular speed
grade (that is, the timing characteristics of a -1 speed grade
industrial device are the same as for a -1 speed grade
commercial device). However, only selected speed grades
and/or devices might be available in the industrial range.
All supply voltage and junction temperature specifications
are representative of worst-case conditions. The
parameters included are common to popular designs and
typical applications.
This Virtex-5 FPGA data sheet, part of an overall set of
documentation on the Virtex-5 family of FPGAs, is available
on the Xilinx website:
All specifications are subject to change without notice.
Virtex-5 FPGA DC Characteristics
0
Virtex-5 FPGA Data Sheet:
DC and Switching Characteristics
DS202 (v5.3) May 5, 2010
00
Product Specification
Table 1: Absolute Maximum Ratings
Symbol
Description
Units
VCCINT
Internal supply voltage relative to GND
–0.5 to 1.1
V
VCCAUX
Auxiliary supply voltage relative to GND
–0.5 to 3.0
V
VCCO
Output drivers supply voltage relative to GND
–0.5 to 3.75
V
VBATT
Key memory battery backup supply
–0.5 to 4.05
V
VREF
Input reference voltage
–0.5 to 3.75
V
VIN(3)
3.3V I/O input voltage relative to GND(4) (user and dedicated I/Os)
–0.75 to 4.05
V
3.3V I/O input voltage relative to GND (restricted to maximum of 100 user I/Os)(5)
–0.95 to 4.4
(Commercial Temperature)
V
–0.85 to 4.3
(Industrial Temperature)
2.5V or below I/O input voltage relative to GND (user and dedicated I/Os)
–0.75 to VCCO + 0.5
V
IIN
Current applied to an I/O pin, powered or unpowered
±100
mA
Total current applied to all I/O pins, powered or unpowered
±100
mA
VTS
Voltage applied to 3-state 3.3V output(4) (user and dedicated I/Os)
–0.75 to 4.05
V
Voltage applied to 3-state 2.5V or below output (user and dedicated I/Os)
–0.75 to VCCO + 0.5
V
TSTG
Storage temperature (ambient)
–65 to 150
°C
TSOL
Maximum soldering temperature(2)
+220
°C
TJ
Maximum junction temperature(2)
+125
°C
Notes:
1.
Stresses beyond those listed under Absolute Maximum Ratings might cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those listed under Operating Conditions is not implied. Exposure to Absolute
Maximum Ratings conditions for extended periods of time might affect device reliability.
2.
For soldering guidelines, refer to UG112: Device Package User Guide. For thermal considerations, refer to UG195: Virtex-5 FPGA Packaging and
Pinout Specification on the Xilinx website.
3.
3.3V I/O absolute maximum limit applied to DC and AC signals.
4.
For 3.3V I/O operation, refer to UG190: Virtex-5 FPGA User Guide, Chapter 6, 3.3V I/O Design Guidelines.
5.
For more flexibility in specific designs, a maximum of 100 user I/Os can be stressed beyond the normal specification for no more than 20% of a data period.
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