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參數資料
型號: HX6228TVRT
廠商: Honeywell International Inc.
英文描述: 128K x 8 STATIC RAM-SOI HX6228
中文描述: 128K的× 8靜態(tài)RAM的絕緣硅HX6228
文件頁數: 10/12頁
文件大小: 153K
代理商: HX6228TVRT
HX6228
10
PACKAGING
The 128K x 8 SOI SRAM is offered in a custom 32-lead or
40-lead Flat Pack. The package is constructed of multilayer
ceramic (Al
2
O
3
) and features internal power and ground
planes.
Ceramic chip capacitors can be mounted to the package by
the user to maximize supply noise decoupling and increase
32-LEAD FLAT PACK PINOUT
32-LEAD FLAT PACK
VDD
A15
CE
NWE
A13
A8
A9
A11
NOE
A10
NCS
DQ7
DQ6
DQ5
DQ4
DQ3
NC
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Top
View
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
[1] BSC - Basic lead spacing between centers
[2] Where lead is brazed to package
[3] Parts delivered with leads unformed
[4] Lid connected to VSS
A
b
C
D
e
E
E2
E3
F
L
Q
S
U
V
W
X
Y
Z
0.135 ± 0.015
0.017 ± 0.002
0.004 to 0.009
0.820 ± 0.008
0.050 ± 0.005 [1]
0.600 ± 0.008
0.500 ± 0.008
0.040 ref
0.750 ± 0.005 [2]
0.295 min [3]
0.026 to 0.045
0.035 ± 0.010
0.080 ref
0.380 ref
0.050 ref
0.075 ref
0.010 ref
0.135 ref
All dimensions in inches
22018533-001
E
1
e
b
D
(width)
(pitch)
F
L
TOP
VIEW
E2
A
Lead
Alloy 42
Ceramic
Body
C
E3
Cutout
Area
Q
Kovar
Lid [4]
V
Optional capacitors
in cutout
1
VSS
VDD
VDD
S
U
Z
X
W
Y
BOTTOM
VIEW
board packing density. These capacitors effectively attach
to the internal package power and ground planes. This
design minimizes resistance and inductance of the bond
wire and package, both of which are critical in a transient
radiation environment. All NC (no connect) pins
should
be
connected to VSS to
prevent charge build up in the
radiation environment.
40-LEAD FLAT PACK PINOUT
A15
VSS
VDD
NWE
CE
A13
A8
A9
A11
NOE
A10
NCS
DQ7
DQ6
DQ5
DQ4
DQ3
VDD
VSS
NC
A16
VSS
VDD
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
NC
VDD
VSS
NC
Top
View
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
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