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參數資料
| 型號： | HY27SAxxx |
| 廠商： | Hynix Semiconductor Inc. |
| 英文描述： | 1Gbit (128Mx8bit / 64Mx16bit) NAND Flash Memory |
| 中文描述： | 1Gbit的（128Mx8bit / 64Mx16bit）NAND閃存 |
| 文件頁數： | 11/43頁 |
| 文件大小： | 729K |
| 代理商： | HY27SAXXX |
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Rev 0.5 / Oct. 2004
11
HY27UA(08/16)1G1M Series
HY27SA(08/16)1G1M Series
1Gbit (128Mx8bit / 64Mx16bit) NAND Flash
Table 2. Bus Operation
Note : (1) Only for x16 devices.
(2) WP must be V
IH
when issuing a program or erase command.
Table 3: Address Insertion, x8 Devices
Note: (1). A8 is set Low or High by the 00h or 01h Command, see Pointer Operations section.
(2). Any additional address input cycles will be ignored with tALS > 0ns.
Table4: Address Insertion, x16 Devices
Note: (1). A8 is Don
'
t Care in x16 devices.
(2). Any additional address input cycles will be ignored with tALS > 0ns.
(3). A1 is the Least Significant Address for x16 devices.
(4). The 01h Command is not used in x16 devices.
BUS Operation
CE
ALE
CLE
RE
WE
WP
I/O
0
- I/O
7
I/O
8
- I/O
15(1)
Command Input
V
IL
V
IL
V
IH
V
IH
Rising
X
(2)
Command
X
Address Input
V
IL
V
IH
V
IL
V
IH
Rising
X
Address
X
Data Input
V
IL
V
IL
V
IL
V
IH
Rising
X
Data Input
Data Input
Data Output
V
IL
V
IL
V
IL
Falling
V
IH
X
Data Output
Data Output
Write Protect
X
X
X
X
X
V
IL
X
X
Standby
V
IH
X
X
X
X
X
X
X
Bus Cycle
I/O
7
A7
I/O
6
A6
I/O
5
A5
I/O
4
A4
I/O
3
A3
I/O
2
A2
I/O
1
A1
I/O
0
A0
1st Cycle
2nd Cycle
A16
A15
A14
A13
A12
A11
A10
A9
3rd Cycle
A24
A23
A22
A21
A20
A19
A18
A17
4th Cycle
V
IL
V
IL
V
IL
V
IL
V
IL
V
IL
A26
A25
Bus Cycle
I/O
8
-I/
O
15
X
I/O
7
I/O
6
I/O
5
I/O
4
I/O
3
I/O
2
I/O
1
I/O
0
1st Cycle
A7
A6
A5
A4
A3
A2
A1
A0
2nd Cycle
X
A16
A15
A14
A13
A12
A11
A10
A9
3rd Cycle
X
A24
A23
A22
A21
A20
A19
A18
A17
4th Cycle
V
IL
V
IL
V
IL
V
IL
V
IL
V
IL
V
IL
A26
A25
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| HY27SF081G2M-T | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:1Gbit (128Mx8bit / 64Mx16bit) NAND Flash Memory |
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