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參數資料
| 型號： | HY57V641620ET-5 |
| 廠商： | HYNIX SEMICONDUCTOR INC |
| 元件分類： | DRAM |
| 英文描述： | 64Mb Synchronous DRAM based on 1M x 4Bank x16 I/O |
| 中文描述： | 4M X 16 SYNCHRONOUS DRAM, 4.5 ns, PDSO54 |
| 封裝： | 0.400 X 0.875 INCH, 0.80 MM PITCH, TSOP2-54 |
| 文件頁數： | 1/13頁 |
| 文件大?。?/td> | 122K |
| 代理商： | HY57V641620ET-5 |
This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for
use of circuits described. No patent licenses are implied.
Rev. 1.5 / Feb. 2005
1
64Mb Synchronous DRAM based on 1M x 4Bank x16 I/ O
Document Title
4Bank x 1M x 16bits Synchronous DRAM
Revision History
Revision No.
History
Draft Date
Remark
1.0
First Version Release
Nov. 2004
1. Changed tOH: 2.0 --> 2.5
[tCK = 7 & 7.5 (CL3) Product]
1.1
1. Changed Input High/Low Voltage (Page 08)
2. Changed DC characteristics (Page 09)
- IDD2NS: 18mA -> 15mA
- IDD5:210 / 195 / 180mA -> 170 / 160 / 150mA
[Speed 200 / 166 / 143 / 133MHz]
3. Changed Clock High / Low pulse width Time (Page 11)
4. Changed tAC Time (Page11)
5. Changed tRRD Time (Page12)
Dec. 2004
1.2
1. Corrected Revision No.: 2.0 -> 1.1
2. Deleted Remark at Revision History
3. Corrected AC OPERATING CONDITION
- CL 50pF -> 30pF
4. Changed DC OPERATING CONDITION
- VIH MAX VDDQ+2.0 -> VDDQ+0.3 and Typ 3.3 -> 3.0
- VIL MIN VSSQ-2.0 -> -0.3
Dec. 2004
1.3
1. Modified note for Super Low Power in ORDERING INFORMATION
Jan. 2005
1.4
1. Corrected PIN ASSIGNMENT A12 to NC
Jan. 2005
1.5
1. Corrected comments for overshoot and undershoot
Feb. 2005
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相關代理商/技術參數 |
參數描述 |
|---|---|
| HY57V641620ET-6 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:64Mb Synchronous DRAM based on 1M x 4Bank x16 I/O |
| HY57V641620ET-7 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:64Mb Synchronous DRAM based on 1M x 4Bank x16 I/O |
| HY57V641620ET-H | 制造商:SK Hynix Inc 功能描述:SDRAM, 4M x 16, 54 Pin, Plastic, TSOP |
| HY57V641620FTP-6-C | 制造商:SK Hynix Inc 功能描述: |
| HY57V641620FTP-6DR-C | 制造商:SK Hynix Inc 功能描述: |
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