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參數(shù)資料
| 型號： | HY57V643220DST-55 |
| 廠商： | HYNIX SEMICONDUCTOR INC |
| 元件分類： | DRAM |
| 英文描述： | 4Banks x 512K x 32bits Synchronous DRAM |
| 中文描述： | 2M X 32 SYNCHRONOUS DRAM, 5 ns, PDSO86 |
| 封裝： | 0.400 X 0.875 INCH, 0.50 MM PITCH, TSOP2-86 |
| 文件頁數(shù)： | 1/13頁 |
| 文件大小： | 227K |
| 代理商： | HY57V643220DST-55 |
This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for
use of circuits described. No patent licenses are implied.
Rev. 0.3 / Sep. 2004
1
HY57V643220D(L/S)T(P) Series
4Banks x 512K x 32bits Synchronous DRAM
Document Title
4Bank x 512K x 32bits Synchronous DRAM
Revision History
Revision
No.
0.1
0.2
History
Draft Date
Remark
Initial Draft
Removed Preliminary
May. 2004
July 2004
Preliminary
0.3
1. Updated Output Load Capacitance for Access Time Measurement CL = 30pF
in AC OPERATING TEST CONDITION
2. Updated the tolerance zone of the leads and the description of the package
type in PACKAGE DIMENSION
Sep. 2004
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HY57V643220DST-6 | 4Banks x 512K x 32bits Synchronous DRAM |
| HY57V643220DST-7 | 4Banks x 512K x 32bits Synchronous DRAM |
| HY57V643220DSTP-45 | 4Banks x 512K x 32bits Synchronous DRAM |
| HY57V643220DSTP-5 | 4Banks x 512K x 32bits Synchronous DRAM |
| HY57V643220DSTP-55 | 4Banks x 512K x 32bits Synchronous DRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HY57V643220DST-6 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:4Banks x 512K x 32bits Synchronous DRAM |
| HY57V643220DST-7 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:4Banks x 512K x 32bits Synchronous DRAM |
| HY57V643220DSTP-45 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:4Banks x 512K x 32bits Synchronous DRAM |
| HY57V643220DSTP-5 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:4Banks x 512K x 32bits Synchronous DRAM |
| HY57V643220DSTP-55 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:4Banks x 512K x 32bits Synchronous DRAM |
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