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參數(shù)資料
| 型號(hào)： | HY62U8100ALST-12 |
| 廠商： | HYNIX SEMICONDUCTOR INC |
| 元件分類(lèi)： | SRAM |
| 英文描述： | 128K X 8 STANDARD SRAM, 120 ns, PDSO32 |
| 封裝： | 8 X 13.40 MM, TSOP1-32 |
| 文件頁(yè)數(shù)： | 1/11頁(yè) |
| 文件大小： | 167K |
| 代理商： | HY62U8100ALST-12 |
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any
responsibility for use of circuits described. No patent licenses are implied.
Rev.06 /Jan.99
Hyundai Semiconductor
HY62V8100A-(I)/HY62U8100A-(I) Series
128Kx8bit CMOS SRAM
DESCRIPTION
The HY62V8100A-(I)/HY62U8100A-(I) is a high
speed, low power and 1M bit CMOS SRAM
organized
as
131,072
words
by
8bit.
The
HY62V8100A-(I) / HY62U8100A-(I) uses high
performance CMOS process technology and
designed
for
high
speed
low
power
circuit
technology. It is particulary well suited for used in
high density low power system application. This
device has a data retention mode that guarantees
data to remain valid at a minimum power supply
voltage of 2.0V.
FEATURES
Fully static operation and Tri-state output
TTL compatible inputs and outputs
Battery backup(L/LL-part)
- 2.0V(min) data retention
Standard pin configuration
- 32pin 8x20mm/ 8x13.4mm Small TSOP-I
(Standard and Reversed)
Product
Voltage
Speed
Operation
Standby Current(uA)
Temperature
No.
(V)
(ns)
Current(mA)
L
LL
(
°C)
HY62V8100A
3.3
85/100/120
5
50
10
0~70(Normal)
HY62V8100A-I
3.3
85/100/120
5
50
20
-40~85(E.T.)
HY62U8100A
3.0
100/120/150
5
50
10
0~70(Normal)
HY62U8100A-I
3.0
100/120/150
5
50
15
-40~85(E.T.)
Note 1. E.T. : Extended Temperature, Normal : Normal Temperature
2. Current value is max.
PIN CONNECTION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
/OE
A10
DQ8
DQ7
DQ6
DQ5
DQ4
Vss
DQ3
DQ2
DQ1
A0
A1
A2
A3
A11
A9
A8
A13
/WE
CS2
A15
Vcc
NC
A16
A14
A12
A7
A6
A5
A4
/CS1
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
A3
A2
A0
DQ1
DQ2
DQ3
Vss
DQ4
DQ5
DQ6
DQ7
DQ8
/CS1
A10
/OE
A4
A5
A6
A7
A12
A14
A16
NC
Vcc
A15
CS2
/WE
A13
A8
A9
A11
A1
TSOP-I/Small TSOP-I
(Standard)
(Reversed)
PIN DESCRIPTION
BLOCK DIAGRAM
Pin Name
Pin Function
/CS1
Chip Select 1
CS2
Chip Select 2
/WE
Write Enable
/OE
Output Enable
A0 ~ A16
Address Input
I/O1 ~ I/O8
Data Input/Output
Vcc
Power(3.3V or 3.0V)
Vss
Ground
CS2
A16
COLUMN
DECODER
A0
ROW DECODER
MEMORY ARRAY
1024x1024
SENSE
AMP
OUTPUT
BUFFER
I/O1
I/O8
ADD
INPUT
BUFFER
/CS1
/OE
/WE
WRITE
DRIVER
CONTROL
LOGIC
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HY62U8100B | 制造商:HYNIX 制造商全稱(chēng):Hynix Semiconductor 功能描述:128K x8 bit 3.0V Low Power CMOS slow SRAM |
| HY62U8100B-E | 制造商:HYNIX 制造商全稱(chēng):Hynix Semiconductor 功能描述:128K x8 bit 3.0V Low Power CMOS slow SRAM |
| HY62U8100B-I | 制造商:HYNIX 制造商全稱(chēng):Hynix Semiconductor 功能描述:128K x8 bit 3.0V Low Power CMOS slow SRAM |
| HY62U8100BLLG | 制造商:HYNIX 制造商全稱(chēng):Hynix Semiconductor 功能描述:128K x8 bit 3.0V Low Power CMOS slow SRAM |
| HY62U8100BLLG-E | 制造商:HYNIX 制造商全稱(chēng):Hynix Semiconductor 功能描述:128K x8 bit 3.0V Low Power CMOS slow SRAM |
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