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參數(shù)資料
| 型號(hào)： | HYS72V64300GR-7-D |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | PC133 Registered SDRAM-Modules |
| 中文描述： | PC133的SDRAM的注冊(cè)模塊 |
| 文件頁(yè)數(shù)： | 1/22頁(yè) |
| 文件大小： | 593K |
| 代理商： | HYS72V64300GR-7-D |
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INFINEON Technologies
1
2002-07-18
HYS 72Vxx3xxGR
PC133 Registered SDRAM-Modules
3.3 V 168-pin Registered SDRAM Modules
PC133 128 MByte Module
PC133 256 MByte module
PC133 512 MByte Module
PC133 1 GByte Module
PC133 2 GByte Module
Description
The HYS 72Vxx3xxGR-7 and -7.5 are industry standard 168-pin 8-byte Dual in-line Memory Modules (DIMMs)
organized as 16M
×
72, 32M x 72, 64M
×
72, 128M
×
72 and 256M x 72 high speed memory arrays designed with
Synchronous DRAMs (SDRAMs) for ECC applications. All control and address signals are registered on-DIMM
and the design incorporates a PLL circuit for the Clock inputs. Use of an on-board register reduces capacitive
loading on the input signals but are delayed by one cycle in arriving at the SDRAM devices. Decoupling capacitors
are mounted on the PC board. The DIMMs use a serial presence detects scheme implemented via a serial
E
2
PROM using the 2-pin I
2
C protocol. The first 128 bytes are utilized by the DIMM manufacturer and the second
128 bytes are available to the end user. All Infineon 168-pin DIMMs provide a high performance, flexible 8-byte
interface in a 133.35 mm long footprint.
168-pin Registered 8 Byte Dual-In-Line
SDRAM Module for PC and Server main
memory applications
One bank 16M
×
72, 32M x 72, 64M
×
72and
128M x 72, two bank 128M
×
72 and
256M x 72 organization
Optimized for ECC applications with very low
input capacitances
JEDEC standard Synchronous DRAMs
(SDRAM)ProgrammableCASLatency,Burst
Length and Wrap Sequence (Sequential &
Interleave)
Single + 3.3 V (
±
0.3 V) power supply
Auto Refresh (CBR) and Self Refresh
Programmable CAS Latency, Burst Length,
and Wrap Sequence (Sequential &
Interleave)
All inputs and outputs are LVTTL compatible
Serial Presence Detect with E
2
PROM
Utilizes SDRAMs in TSOPII-54 packages
with registers and PLL.
Card Size: 133.35 mm
×
38.10 / 43.18 mm
with Gold contact pads and max. 4.00 / 6.80
mm thickness (JEDEC MO-161)
These modules all fully compatible with the
current industry standard PC133 and PC100
specifications
Performance:
speed grade
-7
-7.5
Unit
f
CK
Clock Frequency (max.) @ CL = 3
133
133
MHz
t
CK
Clock Cycle Time (min.) @ CL = 3
7.5
7.5
ns
t
AC
Clock Access Time (min.) @ CL= 3
5.4
5.4
ns
f
CK
Clock Frequency (max.) @ CL = 2
133
100
MHz
t
CK
Clock Cycle Time (min.) @ CL = 2
7.5
10
ns
t
AC
Clock Access Time (min.) @ CL= 2
5.4
6
ns
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HYS72V16300GR-7-E | PC133 Registered SDRAM-Modules |
| HYS72V128300GR-75-A | PC133 Registered SDRAM-Modules |
| HYS72V2563201GR-7-A | PC133 Registered SDRAM-Modules |
| HYS72V16301GR-7-C2 | PC133 Registered SDRAM-Modules |
| HYS72V32301GR-7-C2 | PC133 Registered SDRAM-Modules |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HYS72V64300GR-8 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SDRAM|64MX72|CMOS|DIMM|168PIN|PLASTIC |
| HYS72V64300GR-8-C2 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:?512MB PC100 (2-2-2) 1-bank End-of-Life? |
| HYS72V64500GR-7.5 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SDRAM|64MX72|CMOS|DIMM|168PIN|PLASTIC |
| HYS72V64500GR-7.5-C2 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:?512MB (64Mx72) PC133 (3-3-3) 1-bank? |
| HYS72V64601GR-7.5 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SDRAM|64MX72|CMOS|DIMM|168PIN|PLASTIC |
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