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參數(shù)資料
型號(hào): ICS1574BMT
廠商: IDT, Integrated Device Technology Inc
文件頁(yè)數(shù): 1/12頁(yè)
文件大?。?/td> 0K
描述: IC CLOCK GEN PROGR LASER 16-SOIC
產(chǎn)品變化通告: Product Discontinuation 13/May/2009
標(biāo)準(zhǔn)包裝: 2,500
類型: 時(shí)鐘/頻率合成器,時(shí)鐘發(fā)生器
PLL:
輸入: 時(shí)鐘,晶體
輸出: CMOS
電路數(shù): 1
比率 - 輸入:輸出: 1:1
差分 - 輸入:輸出: 無(wú)/無(wú)
頻率 - 最大: 400MHz
除法器/乘法器: 是/無(wú)
電源電壓: 4.75 V ~ 5.25 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC
包裝: 帶卷 (TR)
其它名稱: 1574BMT
Integrated
Circuit
Systems, Inc.
Description
Features
ICS1574B
Block Diagram
User Programmable Laser Engine Pixel Clock Generator
1574B
05/13/10
Supports high resolution laser graphics. PLL/VCO
frequency re-programmable through serial interface
port to 400 MHz; allows less than ±1.5ns pixel clock
resolution.
Laser pixel clock output is synchronized with
conditioned beam detect input
Ideal for laser printer, copier and FAX pixel clock
applications
On-chip PLL with internal loop filter
On-chip XTAL oscillator frequency reference
Resettable, programmable counter gives glitch-free
clock alignment
Single 5 volt power supply
Low power CMOS technology
16-pin 0.150" SOIC package (Pb free available)
User re-programmable clock frequency supports
zoom and gray scale functions
The ICS1574B is a very high performance monolithic phase-
locked loop (PLL) frequency synthesizer designed for laser
engine applications. Utilizing ICS’s advanced CMOS mixed-
mode technology, the ICS1574B provides a low cost solution
for high-end pixel clock generation for a variety of laser en-
gine product applications.
The pixel clock output (PCLK) frequency is derived from the
main clock by a programmable resettable divider.
Operating frequencies are fully programmable with direct
control provided for reference divider, feedback divider and
post-scaler.
Figure 1
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