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參數資料
型號: ICS200
英文描述: SMPTE Time Code Receiver/Generator
中文描述: SMPTE時間碼接收器/發電機
文件頁數: 1/21頁
文件大小: 285K
代理商: ICS200
Integrated
Circuit
Systems, Inc.
General Description
Features
ICS2008B
ICS2008B Rev D 4/05/05
Block Diagram
SMPTE Time Code Receiver/Generator
Meets SMPTE VITC Specifications
Meets SMPTE and EBU LTC Specifications
Time Code Burn-in Window
– Programmable position, size and character attributes
LTC edge rate control
– Conforms to EBU T
r
and T
f
Specifications
Internal and external sync sources
– Genlock to video or house sync inputs
– Improved video timing lock during VCR pause and
shuttle modes
– Internally generated timing from oscillator input
– External click input
– Internal Timer
Allows 1/4 Frame MIDI Time Code Messages
LTC and VITC Generators
– Real Time SMPTE Rates:
30 Hz, 29.97 Hz, 25 Hz, 24 Hz
– Time Code Modes
Drop Frame and Color Frame
– VITC can be inserted on two lines from 10-40
(SMPTE specifies lines 10-20)
– Jam Sync, freewheeling, error bypass/correction,
and plus-one-frame capability
LTC Receiver
– Synchronize bit rates from 1/30
th
nominal to 80X
nominal playback speed.
VITC Receiver
– Reads code from any or all selected scan lines.
– VITC search mode, will search through VBI lines until
VITC is found.
New UART frequency of 38.4 K for tape transport control
The ICS2008B
, SMPTE Time Code Receiver/Generator
chip, is a VLSI device designed in a low power CMOS
process. This device provides the timing coordination for
Multimedia sight and sound events. Although it is aimed at
a PC Multimedia environment, the
ICS2008B
is easily
integrated into products requiring SMPTE time code
generation and/or reception in LTC (Longitudinal Time
Code) and/or VITC (Vertical Interval Time Code) formats
and MTC (MIDI Time Code) translation.
Taking its input from composite video, S-Video, or an
audio track, the
ICS2008B
can read SMPTE time code in
VITC and LTC formats. Time code output formats are LTC
and VITC. All are available simultaneously. A UART is
provided for the user to support MTC or tape transport
control.
The processor interface is compatible with the IBM PC and
ISA bus compatible computers and is easily interfaced to
other processors and micro-controllers.
The
ICS2008B
is an improved version of the
ICS2008
,
with additional features and capabilities.
ICS2008 ICS2008B 2008 2008B
ICS reserves the right to make changes in the device data identified in this publication without
further notice. ICS advises its customers to obtain the latest version of all device data to verify
that any information being relied upon by the customer is current and accurate.
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