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參數(shù)資料
型號(hào): ICS650-05
英文描述: HDTV Clock Synthesizer
中文描述: 高清晰度電視時(shí)鐘合成器
文件頁(yè)數(shù): 1/4頁(yè)
文件大小: 42K
代理商: ICS650-05
ICS650-01
System Peripheral Clock Source
MDS 650-01 C
Integrated Circuit Systems 525 Race Street San Jose CA95126 (408) 295-9800tel (408) 295-9818fax
1
Revision 092799
Printed 11/15/00
The ICS650-01 is a low cost, low jitter, high
performance clock synthesizer for system
peripheral applications. Using analog/digital
Phase-Locked Loop (PLL) techniques, the device
accepts a parallel resonant 14.31818 MHz crystal
input to produce up to eight output clocks. The
device provides clocks for PCI, SCSI, Fast
Ethernet, Ethernet, USB, and AC97. The user can
select one of three USB frequencies, and also one
of three AC97 audio frequencies. The OE pin puts
all outputs into a high impedance state for board
level testing. All frequencies are generated with less
than one ppm error, meeting the demands of SCSI
and Ethernet clocking.
The ICS650 can be mask customized to produce
any frequencies from 1 to 150 MHz.
Block Diagram
Description
Features
Packaged in 20 pin tiny SSOP (QSOP)
Operating VDD of 3.3V or 5V
Less than one ppm synthesis error in all clocks
Inexpensive 14.31818 MHz crystal or clock input
Provides Ethernet and Fast Ethernet clocks
Provides SCSI clocks
Provides PCI clocks
Selectable AC97 audio clock
Selectable USB clock
OE pin tri-states the outputs for testing
Selectable frequencies on three clocks
Duty cycle of 40/60
Advanced, low power CMOS process
Crystal
Oscillator
Clock
Synthesis
Circuitry
Output
Buffer
USB Clock
Output
Buffers
Audio Clock
Processor Clocks
(Fast Ethernet,
SCSI, PCI )
Output
Buffer
2
PSEL1:0
14.31818 MHz
crystal
or clock
X1/ICLK
X2
14.31818 MHz
Output
Buffer
4
ASEL
USEL
20 MHz
Output
Buffers
Output Enable (all outputs)
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