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參數(shù)資料
| 型號： | ICS663MIT |
| 英文描述： | PLL BUILDING BLOCK |
| 中文描述： | 鎖相環(huán)積木 |
| 文件頁數(shù)： | 1/7頁 |
| 文件大小： | 146K |
| 代理商： | ICS663MIT |
ICS663
MDS 663 D
1
Revision 062904
Integrated Circuit Systems
●
525 Race Street, San Jose, CA 95126
●
tel (408) 297-1201
●
www.icst.com
PLL B
UILDING
B
LOCK
Description
The ICS663 is a low cost Phase-Locked Loop (PLL)
designed for clock synthesis and synchronization.
Included on the chip are the phase detector, charge
pump, Voltage Controlled Oscillator (VCO) and an
output buffer. Through the use of external reference
and VCO dividers (implemented with the ICS674-01,
for example), the user can easily configure the device
to lock to a wide variety of input frequencies.
The phase detector and VCO functions of the device
can also be used independently. This enables the
configuration of other PLL circuits. For example, the
ICS663 phase detector can be used to control a VCXO
circuit such as the MK3754.
For applications requiring Power Down or Output
Enable features, please refer to the ICS673-01.
Features
Packaged in 8-pin SOIC
Output clock range 1 MHz to 100 MHz (3.3 V), 1 MHz
to 120 MHz (5 V)
External PLL loop filter enables configuration for a
wide range of input frequencies
Ability to accept an input clock in the kHz range
(video Hsync, for example)
25 mA output drive capability at TTL levels
Lower power CMOS process
+3.3 V ±5% or +5 V ±10% operating voltage
Used along with the ICS674-01, forms a complete
PLL circuit
Phase detector and VCO blocks can be used
independently for other PLL configurations
Industrial temperature version available
For better jitter performance, use the MK1575
Block Diagram
REFIN
Phase/
Frequency
Detector
VCO
4
2
SEL
LFR
LF
UP
FBIN
DOWN
I
cp
I
cp
CLK
VDD
MUX
0
1
External Feedback Divider
(such as the ICS674-01)
Clock Input
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ICS663 | PLL BUILDING BLOCK |
| ICS663M | PLL BUILDING BLOCK |
| ICS663MI | PLL BUILDING BLOCK |
| ICS663MT | PLL BUILDING BLOCK |
| ICS664-01 | Digital Video Clock Source |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS663MLF | 功能描述:IC PLL BUILDING BLOCK 8-SOIC RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:Precision Edge® 類型:時(shí)鐘/頻率合成器 PLL:無 輸入:CML，PECL 輸出:CML 電路數(shù):1 比率 - 輸入:輸出:2:1 差分 - 輸入:輸出:是/是 頻率 - 最大:10.7GHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-VFQFN 裸露焊盤，16-MLF? 供應(yīng)商設(shè)備封裝:16-MLF?（3x3） 包裝:帶卷 (TR) 其它名稱:SY58052UMGTRSY58052UMGTR-ND |
| ICS663MLFT | 功能描述:IC PLL BUILDING BLOCK 8-SOIC RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:2,000 系列:- 類型:PLL 時(shí)鐘發(fā)生器 PLL:帶旁路 輸入:LVCMOS，LVPECL 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:2:11 差分 - 輸入:輸出:是/無 頻率 - 最大:240MHz 除法器/乘法器:是/無 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應(yīng)商設(shè)備封裝:32-TQFP（7x7） 包裝:帶卷 (TR) |
| ICS663MT | 功能描述:IC PLL BUILDING BLOCK 8-SOIC RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 產(chǎn)品變化通告:Product Discontinuation 04/May/2011 標(biāo)準(zhǔn)包裝:96 系列:- 類型:時(shí)鐘倍頻器，零延遲緩沖器 PLL:帶旁路 輸入:LVTTL 輸出:LVTTL 電路數(shù):1 比率 - 輸入:輸出:1:8 差分 - 輸入:輸出:無/無 頻率 - 最大:133.3MHz 除法器/乘法器:是/無 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:管件 其它名稱:23S08-5HPGG |
| ICS664-01 | 制造商:ICS 制造商全稱:ICS 功能描述:Digital Video Clock Source |
| ICS664-02 | 制造商:ICS 制造商全稱:ICS 功能描述:PECL Digital Video Clock Source |
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