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參數資料
| 型號： | ICS83948AY-147LFT |
| 元件分類： | 時鐘及定時 |
| 英文描述： | LOW SKEW CLOCK DRIVER, 12 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| 封裝： | 7 X 7 MM, 1.40 MM HEIGHT, MS-026, LQFP-32 |
| 文件頁數： | 1/12頁 |
| 文件大小： | 126K |
| 代理商： | ICS83948AY-147LFT |
83948AY-147
www.icst.com/products/hiperclocks.html
REV. A FEBRUARY 8, 2002
1
Integrated
Circuit
Systems, Inc.
ICS83948-147
LOW SKEW, 1-TO-12
DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER
PRELIMINARY
GENERAL DESCRIPTION
The ICS83948-147 is a low skew, 1-to-12 Differ-
ential-to-LVCMOS Fanout Buffer and a member
of the HiPerClockS family of High Performance
Clock Solutions from ICS. The ICS83948-147
has two selectable clock inputs. The CLK, nCLK
pair can accept most standard differential input levels. The
LVCMOS_CLK can accept LVCMOS or LVTTL input levels.
The low impedance LVCMOS outputs are designed to drive
50
series or parallel terminated transmission lines. The
effective fanout can be increased from 12 to 24 by utilizing
the ability of the outputs to drive two series terminated lines.
The ICS83948-147 is characterized at 3.3V core/3.3V output
and 3.3V core/2.5V output. Guaranteed output and part-to-
part skew characteristics make the ICS83948-147 ideal for
those clock distribution applications demanding well defined
performance and repeatability.
BLOCK DIAGRAM
PIN ASSIGNMENT
FEATURES
12 LVCMOS outputs
Selectable LVCMOS clock or differential CLK, nCLK inputs
CLK, nCLK pair can accept the following differential
input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL
LVCMOS_CLK accepts the following input levels:
LVCMOS or LVTTL
Maximum output frequency: 350MHz (typical)
Output skew: 50ps (typical)
Part-to-part skew: 500ps (typical)
3.3V core, 3.3V output and 3.3V core, 2.5V output
0°C to 70°C ambient operating temperature
Industrial temperature information available upon request
Pin compatible with the MPC948/948L
HiPerClockS
,&6
32-Lead LQFP
7mm x 7mm x 1.4mm package body
Y Package
Top View
32 31 30 29 28 27 26 25
9
10 11 12 13 14 15 16
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
GND
Q4
VDDO
Q5
GND
Q6
VDDO
Q7
CLK_SEL
LVCMOS_CLK
CLK
nCLK
CLK_EN
OE
VDD
GND
Q8
V
DDO
Q9
GND
Q10
V
DDO
Q11
Q3
V
DDO
Q2
GND
Q1
V
DDO
Q0
GND
ICS83948-147
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q9
Q10
Q11
LVCMOS_CLK
CLK
nCLK
1
0
CLK_EN
CLK_SEL
D
Q
LE
OE
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial
product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.
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| ICS83948AY-147 | LOW SKEW CLOCK DRIVER, 12 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| ICS83948AYI-01T | LOW SKEW CLOCK DRIVER, 12 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| ICS83948AYI-147ILFT | 83948 SERIES, LOW SKEW CLOCK DRIVER, 12 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| ICS83948AYI-147LF | 83948 SERIES, LOW SKEW CLOCK DRIVER, 12 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| ICS83948AYI-147T | 83948 SERIES, LOW SKEW CLOCK DRIVER, 12 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| ICS83948AYI | 制造商:ICS 制造商全稱:ICS 功能描述:LOW SKEW, 1-TO-12 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER |
| ICS83948AYI01 | 制造商:ICS 制造商全稱:ICS 功能描述:LOW SKEW, 1-TO-12 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER |
| ICS83948AYI-01 | 制造商:ICS 制造商全稱:ICS 功能描述:LOW SKEW, 1-TO-12 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER |
| ICS83948AYI-01LF | 功能描述:IC CLOCK BUFFER MUX 2:12 32-LQFP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘緩沖器，驅動器 系列:HiPerClockS™ 標準包裝:74 系列:- 類型:扇出緩沖器（分配） 電路數:1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 輸入:HCSL, LVCMOS, LVDS, LVPECL, LVTTL 輸出:HCSL，LVDS 頻率 - 最大:400MHz 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:32-VFQFN 裸露焊盤 供應商設備封裝:32-QFN（5x5） 包裝:管件 |
| ICS83948AYI-01LFT | 功能描述:IC CLOCK BUFFER MUX 2:12 32-LQFP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘緩沖器，驅動器 系列:HiPerClockS™ 標準包裝:74 系列:- 類型:扇出緩沖器（分配） 電路數:1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 輸入:HCSL, LVCMOS, LVDS, LVPECL, LVTTL 輸出:HCSL，LVDS 頻率 - 最大:400MHz 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:32-VFQFN 裸露焊盤 供應商設備封裝:32-QFN（5x5） 包裝:管件 |
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