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參數資料
| 型號： | ICS8732AY-11LFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP52 |
| 封裝： | 10 X 10 MM, 1.40 MM HEIGHT, MS-026, LQFP-52 |
| 文件頁數： | 1/15頁 |
| 文件大小： | 283K |
| 代理商： | ICS8732AY-11LFT |
8732AY-11
www.icst.com/products/hiperclocks.html
REV. A MARCH 3, 2004
1
Integrated
Circuit
Systems, Inc.
ICS8732-11
LOW VOLTAGE, LOW SKEW
3.3V LVPECL CLOCK GENERATOR
PRELIMINARY
GENERAL DESCRIPTION
The ICS8732-11 is a low voltage, low skew,
3.3V LVPECL Clock Generator and a member of
the HiPerClockS family of High Performance
Clock Solutions from ICS. The ICS8732-11 has
two selectable clock inputs. The CLK0, nCLK0
pair can accept most standard differential input levels.
The single ended clock input accepts LVCMOS or LVTTL
input levels. The ICS8732-11 has a fully integrated PLL along
with frequency configurable outputs. An external feedback
input and outputs regenerate clocks with “zero delay”.
The ICS8732-11 has multiple divide select pins for each bank
of outputs along with 3 independent feedback divide select
pins allowing the ICS8732-11 to function both as a frequency
multiplier and divider. The PLL_SEL input can be used
to bypass the PLL for test and system debug purposes.
In bypass mode, the input clock is routed around the PLL
and into the internal output dividers.
Features
10 differential 3.3V LVPECL outputs
Selectable differential CLK0, nCLK0 or
LVCMOS/LVTTL CLK1 inputs
CLK0, nCLK0 supports the following input types:
LVPECL, LVDS, LVHSTL, SSTL, HCSL
CLK1 accepts the following input levels:
LVCMOS or LVTTL
Maximum output frequency: 700MHz
VCO range: 250MHz to 700MHz
External feedback for “zero delay” clock regeneration
with configurable frequencies
Cycle-to-cycle jitter: CLK, nCLK -TBD
CLK1 - TBD
Output skew: TBD
Static phase offset: TBD
Industrial temperature information available upon request
HiPerClockS
ICS
BLOCK DIAGRAM
PIN ASSIGNMENT
V
CCO
QFB1
nQFB1
QFB0
nQFB0
V
EE
V
CC
FB_IN
nFB_IN
FBDIV_SEL0
FBDIV_SEL1
FBDIV_SEL2
V
EE
1
2
3
4
5
6
7
8
9
10
11
12
13
14 15 16 17 18 19 20 21 22 23 24 25 26
39
38
37
36
35
34
33
32
31
30
29
28
27
52 51 50 49 48 47 46 45 44 43 42 41 40
VCCO
QA0
nQA0
QA1
nQA1
VEE
PLL_SEL
VCCO
QA2
nQA2
QA3
nQA3
VEE
VCCO
nQB3
QB3
nQB2
QB2
VEE
MR
VCCO
nQB1
QB1
nQB0
QB0
VEE
V
CC
DIV_SELB0
DIV_SELB1
nc
V
CCA
CLK_SEL
CLK0
nCLK0
CLK1
V
EE
V
CC
DIV_SELA0
DIV_SELA1
52-Lead LQFP
10mm x 10mm x 1.4mm package body
Y package
Top View
ICS8732-11
CLK_SEL
CLK0
nCLK0
CLK1
FB_IN
nFB_IN
PLL_SEL
DIV_SELA0
DIV_SELA1
DIV_SELB0
DIV_SELB1
FBDIV_SEL0
FBDIV_SEL1
FBDIV_SEL2
MR
QA0
nQA0
QA1
nQA1
QA2
nQA2
QA3
nQA3
0
1
PLL
0
1
QB0
nQB0
QB1
nQB1
QB2
nQB2
QB3
nQB3
QFB0
nQFB0
QFB1
nQFB1
÷1 ÷2 ÷4 ÷6
÷1 ÷2 ÷4 ÷8
÷4 ÷6 ÷8 ÷10
÷8 ÷12 ÷16 ÷20
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial
product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.
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| ICS87332AMI-01LFT | 功能描述:IC CLK GEN ECL/LVPECL 8-SOIC RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發生器，PLL，頻率合成器 系列:HiPerClockS™ 標準包裝:1,000 系列:- 類型:時鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數:- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應商設備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
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