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參數資料
型號: ICS9248-65
英文描述: 20-Bit Buffers/Drivers With 3-State Outputs 56-TSSOP -40 to 85
中文描述: 頻率PENDIUM II系統時序發生器
文件頁數: 1/11頁
文件大小: 100K
代理商: ICS9248-65
Integrated
Circuit
Systems, Inc.
ICS9248-185
Block Diagram
Pentium is a trademark of Intel Corporation
I
C is a trademark of Philips Corporation
Frequency Generator & Integrated Buffers for PENTIUM/Pro
TM
& K6
9248-185 RevC - 10/25/01
Pin Configuration
28-Pin SSOP/TSSOP
* Internal Pull-up Resistor of 120K to VDD
1. These pin will have 2X drive strength
2. FS1 is a pull down
Recommended Application:
VIA PM133 chipset
Output Features:
2 - CPUs @ 2.5V
5 - SDRAM @ 3.3V
3 - PCI @ 3.3V,
1 - 48MHz, @ 3.3V fixed.
2 - REF @ 3.3V, 14.318MHz.
Features:
Up to 133MHz frequency support
Support power management: PCI_STOP & CLK_STOP
Spread spectrum for EMI control (-0.5% down spread).
Uses external 14.318MHz crystal
FS pins for frequency select
Key Specifications:
CPU – PCI Skew: 1-4ns
PCI – PCI Skew: ±500ps
CPU – CPU Skew: ±175ps
CPU Jitter: 250ps (cyc-cyc)
PCI Jitter: 500ps (cyc-cyc)
BUFFER_IN
PLL2
PLL1
Spread
Spectrum
48MHz
CPUCLK1
SDRAM (4:1)
PCICLK (1:0)
2
2
4
SDRAM0/_F
CPUCLK0/_F
PCICLK_F
X1
X2
XTAL
OSC
DCPU
DIPCI
Stop
Stop
Stop
PCI_STOP#
CLK_STOP#
FS (1:0)
Control
Logic
Config.
Reg.
REF (1:0)
Frequency Select
VDD
REF0
GND
X1
X2
VDDPCI
*PCICLK_F
GND
FS1/PCICLK0
BUFFER_IN
PCICLK1
PCI_STOP#
GND
*FS0/48MHz
1
1, 2
REF1/FREE_SEL*
VDDL
CPUCLK0/_F
CPUCLK1
GND
CLK_STOP#
SDRAM0/_F
SDRAM1
SDRAM2
GND
VDDSDR
SDRAM3
SDRAM4
VDD48
1
I
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
S
F
0
S
F
K
L
C
U
P
C
K
L
C
I
C
P
n
d
w
o
D
a
S
0
0
6
6
6
3
3
3
%
5
0
1
0
0
0
1
3
3
3
%
5
1
0
0
0
9
3
3
3
%
5
1
1
3
3
3
1
3
3
3
%
5
ICS reserves the right to make changes in the device data identified in
this publication without further notice. ICS advises its customers to
obtain the latest version of all device data to verify that any
information being relied upon by the customer is current and accurate.
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