
ICS9248-135
Third party brands and names are the property of their respective owners.
Integrated
Circuit
Systems, Inc.
Block Diagram
9248-135 Rev A 1/16/01
Recommended Application:
Motherboard Single chip clock solution for SIS540,
SIS630 Pentium II/III and K6 chipsets.
Output Features:
3- CPUs @ 2.5/3.3V, up to 166MHz.
10 - SDRAM @ 3.3V, up to 166MHz
including 2 SDRAM_F's
7- PCI @3.3V,
1- 48MHz, @3.3V fixed.
1- 24/48MHz, @3.3V selectable by I
2C
(Default is 24MHz).
2- REF @3.3V, 14.318MHz.
Features:
Up to 166MHz frequency support
Support FS0-FS3 trapping status bit for I
2C read back.
Support power management: CPU, PCI, SDRAM stop
and Power down Mode form I
2C programming.
Spread spectrum for EMI control (0 to -0.5%, ± 0.25%).
FS0, FS1, FS3 must have a internal 120K pull-Down
to GND.
Uses external 14.318MHz crystal
Skew Specifications:
CPU - CPU: < 175ps
SDRAM - SDRAM < 250ps
PCI - PCI: < 500ps
CPU - SDRAM: < 500ps
CPU (early) - PCI: 1-4ns (typ. 2ns)
Functionality
Pin Configuration
48-Pin 300mil SSOP
* These inputs have a 120K pull down to GND.
** These inputs have a 120K pullup to VDD.
1 These are double strength.
VDDREF
* REF0/FS3
GNDREF
X1
X2
VDDPCI
*PCICLK_F/FS1
*PCICLK1/FS2
PCICLK2
GNDPCI
PCICLK3
PCICLK4
PCICLK5
PCICLK6
VDD
GND
SDRAM_STOP#
**PD#
VDD
CPU_STOP#
PCI_STOP#
GND
SDATA
SCLK
1
REF1
VDDLCPU
CPUCLK_F
CPUCLK1
GNDL
CPUCLK2
VDD
SDRAM_F1
SDRAM_F0
GND
SDRAM7
SDRAM6
VDD
SDRAM5
SDRAM4
GND
SDRAM3
SDRAM2
VDD
SDRAM1
SDRAM0
VDD
48MHz/FS0*
24_48MHz/CPU2.5_3.3#*
1
ICS9248-135
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
Frequency Generator & Integrated Buffers for Celeron & PII/III& K6
CPU2.5_3.3#
PLL2
PLL1
Spread
Spectrum
48MHz
24_48MHz
CPUCLK [2:1]
SDRAM [7:0]
PCICLK [6:1]
SDRAM_F [1:0]
CPUCLK_F
PCICLK_F
6
2
8
X1
X2
XTAL
OSC
CPU
DIVDER
SDRAM
DIVDER
PCI
DIVDER
Stop
SDATA
SCLK
FS[3:0]
PD#
PCI_STOP#
CPU_STOP#
SDRAM_STOP#
Control
Logic
Config.
Reg.
/ 2
REF[1:0]
3
S
F2
S
F1
S
F0
S
F
U
P
C
)
z
H
M
(
M
A
R
D
S
)
z
H
M
(
K
L
C
I
C
P
)
z
H
M
(
00
0
6
.
6
60
.
0
13
.
3
00
0
1
0
.
0
10
.
0
13
.
3
00
1
0
.
0
5
10
.
0
15
.
7
3
00
1
3
.
3
10
.
0
13
.
3
01
0
8
.
6
66
.
3
14
.
3
01
0
1
0
.
0
13
.
3
13
.
3
0110
0
.
0
10
.
0
5
15
.
7
3
011
1
3
.
3
13
.
3
13
.
3
10
0
8
.
6
68
.
6
64
.
3
10
0
1
0
.
7
90
.
7
93
.
2
3
10
1
0
.
0
70
.
5
0
10
.
5
3
10
1
0
.
5
90
.
5
97
.
1
3
110
0
.
5
97
.
6
2
17
.
1
3
110
1
0
.
2
1
10
.
2
1
13
.
7
3
11
1
0
.
7
93
.
9
2
12
.
2
3
11
1
2
.
6
92
.
6
91
.
2
3
ICS reserves the right to make changes in the device data identified in
this publication without further notice. ICS advises its customers to
obtain the latest version of all device data to verify that any
information being relied upon by the customer is current and accurate.