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參數資料
| 型號： | ICS94236YF-T |
| 英文描述： | Programmable System Clock Chip for AMD - K7⑩ processor |
| 中文描述： | 可編程系統時鐘芯片為AMD - k7的⑩處理器 |
| 文件頁數： | 1/17頁 |
| 文件大小： | 226K |
| 代理商： | ICS94236YF-T |
Integrated
Circuit
Systems, Inc.
ICS94236
0451A
—
01/10/03
Block Diagram
Functionality
Pin Configuration
48-Pin 300mil SSOP
Internal Pull-up Resistor of 120K to VDD.
Internal Pull-down Resistor of 120K to GND.
Internal Pull-down Resistor of 60K to GND.
Recommended Application:
VIA KX/KT133 style chipset
Output Features:
1 - Differential pair open drain CPU clocks
1 - CPU clock @ 3.3V
13 - SDRAM @ 3.3V
6 - PCI @3.3V,
1 - 48MHz, @3.3V fixed.
1 - 24/48MHz @ 3.3V
2 - REF @3.3V, 14.318MHz.
Features:
Programmable ouput frequency.
Programmable ouput rise/fall time.
Programmable PCI_F and PCICLK skew.
Spread spectrum for EMI control typically
by 7dB to 8dB,
with programmable spread percentage.
Watchdog timer technology to reset system
if over-clocking causes malfunction.
Uses external 14.318MHz crystal.
FS pins for frequency select
Programmable System Clock Chip for AMD - K7
processor
*
**
1
VDDREF
REF0
GND
X1
X2
VDDPCI
FS4/PCICLK_F
**FS3/PCICLK0
GND
*SEL24_48#/PCICLK1
PCICLK2
PCICLK3
PCICLK4
VDDPCI
BUFFER IN
GND
SDRAM11
SDRAM10
VDDSDR
SDRAM9
SDRAM8
GND
SDATA
SCLK
1
REF1/FS2**
GND
CPUCLK
GND
CPUCLKC0
CPUCLKT0
VDDCPU
PD#*
SDRAM_OUT
GND
SDRAM0
SDRAM1
VDDSDR
SDRAM2
SDRAM3
GND
SDRAM4
SDRAM5
VDDSDR
SDRAM6
SDRAM7
VDD48
48MHz/FS0*
24/48MHz/FS1**
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
3
S
F
2
S
F
1
S
F
0
S
F
U
)
H
0
0
9
0
0
1
0
0
1
0
0
1
0
1
1
0
1
1
0
1
1
0
2
1
3
3
1
0
3
1
0
3
1
0
3
1
0
4
1
0
4
1
0
4
1
0
5
1
P
C
M
(
K
L
)
7
3
0
0
7
7
3
0
3
5
5
5
5
5
5
0
C
H
I
C
M
(
6
3
3
3
0
3
0
3
6
3
6
3
3
3
0
4
3
3
7
3
2
3
7
3
2
3
7
3
2
3
5
3
P
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
0
0
0
0
0
3
0
0
0
0
0
0
0
SEL24_48#
BUFFER IN
PLL2
PLL1
Spread
Spectrum
48MHz
24_48MHz
SDRAM (11:0)
PCICLK (4:0)
PCICLK_F
SDRAM_OUT
CPUCLKT0
CPUCLK
CPUCLKC0
X1
X2
XTAL
OSC
CPU
DIVDER
PCI
DIVDER
SDATA
SCLK
FS (4:0)
PD#
Control
Logic
Config.
Reg.
/ 2
REF (1:0)
SDRAM
DRIVER
* 16 additional frequency selectables via FS4, refer to page5
for frequency table.
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