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參數資料
| 型號： | ICS94252YFLF-T |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產生/分配 |
| 英文描述： | 133.33 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | 0.300 INCH, LEAD FREE, MO-118, SSOP-48 |
| 文件頁數： | 1/19頁 |
| 文件大小： | 136K |
| 代理商： | ICS94252YFLF-T |
Integrated
Circuit
Systems, Inc.
ICS94252
0456B—04/12/04
Block Diagram
Functionality
Pin Configuration
48-Pin 300mil SSOP
Recommended Application:
ALI 1651 style chipset
Output Features:
2 - CPU clocks @ 2.5V
13 - SDRAM @ 3.3V
7 - PCI @3.3V
2 - AGP @ 3.3V
1 - IOAPIC @ 2.5V
1 - 48MHz, @3.3V
1 - REF @3.3V, (selectable strength) through I
2C
Features:
Programmable ouput frequency
Programmable ouput rise/fall time
Programmable CPU, SDRAM, PCI and AGP skew
Real time system reset output
Spread spectrum for EMI control typically
by 7dB to 8dB, with programmable spread
percentage
Watchdog timer technology to reset system
if over-clocking causes malfunction
Uses external 14.318MHz crystal
Skew Specifications:
CPU - CPU: <250ps
PCI - PCI: <500ps
SDRAM - SDRAM: <250ps
AGP - AGP: <500ps
PCI - AGP: <350ps
CPU - SDRAM:<350ps
CPU - PCI: <2.5ns
Programmable System Clock Chip for PIII Processor
Notes:
REF0 can be 1X or 2X strength controlled by I
2C.
* Internal Pull-up Resistor of 120K to VDD
** Internal Pull-down of 120K to GND
1. This input has 2X drive strength
PLL2
PLL1
Spread
Spectrum
48MHz
CPUCLK (1:0)
IOAPIC
SDRAM (12:0)
PCICLK (5:0)
AGP (1:0)
RESET#
2
6
13
2
PCICLK_F
X1
X2
XTAL
OSC
CPU
DIVDER
SDRAM
DIVDER
PCI
DIVDER
AGP
DIVDER
Stop
SDATA
SCLK
FS (3:0)
PD#
PCI_STOP#
CPU_STOP#
MODE
Control
Logic
Config.
Reg.
REF0
Note:
PCICLK = 33.33MHz
AGP = 66.66MHz
FS3
FS2
FS1
FS0
CPU
SDRAM
00
0
66.66
0
1
66.66
100.00
0
1
0
100.00
66.66
0
1
100.00
0
1
0
100.00
133.33
0
1
0
1
133.33
66.66
0
1
0
133.33
100.00
0
1
133.33
10
0
66.66
1
0
1
66.66
100.00
1
0
1
0
100.00
66.66
1
0
1
100.00
1
0
100.00
133.33
1
0
1
133.33
66.66
1
0
133.33
100.00
1
133.33
VDDL
IOAPIC
GND
X1
X2
VDD
**FS0/REF0
VDD
**FS1/AGP0
AGP1
GND
*FS2/PCICLK_F
PCICLK0
PCICLK1
RESET#/PCICLK2
GND
VDD
*MODE/PCICLK3
PCICLK4
*(PD#)PCICLK5
VDD
**FS3/48MHz
GND
SCLK
1
GND
CPUCLK0
CPUCLK1
VDDL
SDATA
SDRAM0
SDRAM1
GND
VDD
SDRAM2
SDRAM3
SDRAM4
SDRAM5
VDD
GND
SDRAM6
SDRAM7
SDRAM8
SDRAM9
GND
VDD
SDRAM10(PCI_STOP#)*
SDRAM11(CPU_STOP#)*
SDRAM12(PD#)*
ICS94252
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