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參數(shù)資料
| 型號： | ICS952623YGLFT |
| 元件分類： | 時鐘產生/分配 |
| 英文描述： | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 封裝： | 6.10 MM, 0.50 MM PITCH, MO-153, TSSOP-56 |
| 文件頁數(shù)： | 1/27頁 |
| 文件大小： | 321K |
| 代理商： | ICS952623YGLFT |
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Integrated
Circuit
Systems, Inc.
ICS952623
Advance Information
0758—02/08/05
Pin Configuration
Recommended Application:
CK409 clock, Intel Yellow Cover part
Output Features:
3 - 0.7V current-mode differential CPU pairs
1 - 0.7V current-mode differential SRC pair
7 - PCI (33MHz)
3 - PCICLK_F, (33MHz) free-running
1 - USB, 48MHz
1 - DOT, 48MHz
2 - REF, 14.318MHz
4 - 3V66, 66.66MHz
1 - VCH/3V66, selectable 48MHz or 66MHz
Key Specifications:
CPU/SRC outputs cycle-cycle jitter < 125ps
3V66 outputs cycle-cycle jitter < 250ps
PCI outputs cycle-cycle jitter < 250ps
CPU outputs skew: < 100ps
+/- 300ppm frequency accuracy on CPU & SRC clocks
Programmable Timing Control Hub for Next Gen P4 processor
Functionality
Features/Benefits:
Supports tight ppm accuracy clocks for Serial-ATA
Supports spread spectrum modulation, 0 to -0.5%
down spread and +/- 0.25% center spread
Supports CPU clks up to 400MHz in test mode
Uses external 14.318MHz crystal
Supports undriven differential CPU, SRC pair in PD#
and CPU_STOP# for power management.
ADVANCE INFORMATION documents contain information on products in the formative or design phase development. Characteristic data and other specifications are design goals.
ICS reserves the right to change or discontinue these products without notice. Third party brands and names are the property of their respective owners.
56-pin SSOP & TSSOP
REF0
1
56 FS_B
REF1
2
55 VDDA
VDDREF
3
54 GNDA
X1
4
53 GND
X2
5
52 IREF
GND
6
51 FS_A
PCICLK_F0
7
50 CPU_STOP#
PCICLK_F1
8
49 PCI_STOP#
PCICLK_F2
9
48 VDDCPU
VDDPCI 10
47 CPUCLKT2
GND 11
46 CPUCLKC2
PCICLK0 12
45 GND
PCICLK1 13
44 CPUCLKT1
PCICLK2 14
43 CPUCLKC1
PCICLK3 15
42 VDDCPU
VDDPCI 16
41 CPUCLKT0
GND 17
40 CPUCLKC0
PCICLK4 18
39 GND
PCICLK5 19
38 SRCCLKT
PCICLK6 20
37 SRCCLKC
PD# 21
36 VDD
3V66_0 22
35 Vtt_PWRGD#
3V66_1 23
34 VDD48
VDD3V66 24
33 GND
GND 25
32 48MHz_DOT
3V66_2 26
31 48MHz_USB
3V66_3 27
30 SDATA
SCLK 28
29 3V66_4/VCH
ICS952623
B6b5 FS_A FS_B
CPU
MHz
SRC
MHz
3V66
MHz
PCI
MHz
REF
MHz
USB/DOT
MHz
0
100
100/200 66.66 33.33 14.318
48.00
0MID Ref/N0 Ref/N1 Ref/N2 Ref/N3 Ref/N4
Ref/N5
0
1
200
100/200 66.66 33.33 14.318
48.00
1
0
133
100/200 66.66 33.33 14.318
48.00
1
166
100/200 66.66 33.33 14.318
48.00
1
MID
Hi-Z
0
200
100/200 66.66 33.33 14.318
48.00
0
1
400
100/200 66.66 33.33 14.318
48.00
1
0
266
100/200 66.66 33.33 14.318
48.00
1
333
100/200 66.66 33.33 14.318
48.00
0
1
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ICS952623YGT | 制造商:ICS 制造商全稱:ICS 功能描述:Programmable Timing Control Hub for Next Gen P4 processor |
| ICS952702 | 制造商:ICS 制造商全稱:ICS 功能描述:Programmable Timing Control Hub for K7 System |
| ICS952702YFLF-T | 制造商:ICS 制造商全稱:ICS 功能描述:Programmable Timing Control Hub for K7 System |
| ICS952703 | 制造商:ICS 制造商全稱:ICS 功能描述:Programmable Timing Control Hub for K7 System |
| ICS952703BF | 功能描述:IC TIMING CTRL HUB K7 48-SSOP RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:TCH™ 標準包裝:28 系列:- 類型:時鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務器 輸入:時鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP （0.240"，6.10mm 寬） 供應商設備封裝:64-TSSOP 包裝:管件 |
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