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參數(shù)資料
| 型號： | IDT2305 |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | 3.3V ZERO DELAY CLOCK BUFFER |
| 中文描述： | 3.3零延遲時鐘緩沖器 |
| 文件頁數(shù)： | 1/10頁 |
| 文件大小： | 132K |
| 代理商： | IDT2305 |
1
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
IDT2305
3.3V ZERO DELAY CLOCK BUFFER
APRIL 2001
2001 Integrated Device Technology, Inc.
DSC 5174/4
c
COMMERCIAL AND INDUS T RIAL T EMPERAT URE RANGES
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FEATURES:
Phase-Lock Loop Clock Distribution
10MHz to 133MHz operating frequency
Distributes one clock input to one bank of five outputs
Zero Input-Output Delay
Output Skew < 250ps
Low jitter <200 ps cycle-to-cycle
IDT2305-1 for Standard Drive
IDT2305-1H for High Drive
No external RC network required
Operates at 3.3V V
DD
Power down mode
Available in SOIC package
FUNCTIONAL BLOCK DIAGRAM
IDT2305
3.3V ZERO DELAY
CLOCK BUFFER
PLL
8
CLK1
CLK2
CLK3
CLK4
Control
Logic
REF
CLKOUT
1
3
2
5
7
DESCRIPTION:
The IDT2305 is a high-speed phase-lock loop (PLL) clock buffer,
designed to address high-speed clock distribution applications. The zero
delay is achieved by aligning the phase between the incomng clock and
the output clock, operable within the range of 10 to 133MHz.
The IDT2305 is an 8-pin version of the IDT2309. IDT2305 accepts one
reference input, and drives out five low skew clocks. The -1H version of this
device operates, up to 133MHz frequency and has a higher drive than the
-1 device. All parts have on-chip PLLs which lock to an input clock on the
REF pin. The PLL feedback is on-chip and is obtained fromthe CLKOUT
pad. In the absence of an input clock, the IDT2305 enters power down. In
this mode, the device will draw less than 25
μA,
the outputs are tri-stated,
and the PLL is not running, resulting in a significant reduction of power.
The IDT2305 is characterized for both Industrial and Commercial
operation.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT2305-1 | 3.3V ZERO DELAY CLOCK BUFFER |
| IDT2305-1DC | 3.3V ZERO DELAY CLOCK BUFFER |
| IDT2305-1DCG | 3.3V ZERO DELAY CLOCK BUFFER |
| IDT2305-1DCGI | 3.3V ZERO DELAY CLOCK BUFFER |
| IDT2305-1H | 3.3V ZERO DELAY CLOCK BUFFER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT2305_07 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:3.3V ZERO DELAY CLOCK BUFFER |
| IDT2305_09 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:3.3V ZERO DELAY CLOCK BUFFER No external RC network required |
| IDT2305-1 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:3.3V ZERO DELAY CLOCK BUFFER |
| IDT2305-1DC | 功能描述:IC CLK BUFFER 3.3V ZD 8-SOIC RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 產(chǎn)品變化通告:Product Discontinuation 04/May/2011 標(biāo)準(zhǔn)包裝:96 系列:- 類型:時鐘倍頻器，零延遲緩沖器 PLL:帶旁路 輸入:LVTTL 輸出:LVTTL 電路數(shù):1 比率 - 輸入:輸出:1:8 差分 - 輸入:輸出:無/無 頻率 - 最大:133.3MHz 除法器/乘法器:是/無 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:管件 其它名稱:23S08-5HPGG |
| IDT2305-1DC8 | 功能描述:IC CLK BUFFER 3.3V ZD 8-SOIC RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 產(chǎn)品變化通告:Product Discontinuation 04/May/2011 標(biāo)準(zhǔn)包裝:96 系列:- 類型:時鐘倍頻器，零延遲緩沖器 PLL:帶旁路 輸入:LVTTL 輸出:LVTTL 電路數(shù):1 比率 - 輸入:輸出:1:8 差分 - 輸入:輸出:無/無 頻率 - 最大:133.3MHz 除法器/乘法器:是/無 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:管件 其它名稱:23S08-5HPGG |
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