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參數資料
| 型號： | IDT2309A-1HPGGI |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 3.3V ZERO DELAY CLOCK BUFFER |
| 中文描述： | 2309 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| 封裝： | LEAD FREE, TSSOP-16 |
| 文件頁數： | 1/8頁 |
| 文件大小： | 56K |
| 代理商： | IDT2309A-1HPGGI |
1
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
IDT2309A
3.3V ZERO DELAY CLOCK BUFFER
J ULY 2004
2004 Integrated Device Technology, Inc.
DSC - 6588/4
c
COMMERCIAL AND INDUS T RIAL T EMPERAT URE RANGES
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FEATURES:
Phase-Lock Loop Clock Distribution
10MHz to 133MHz operating frequency
Distributes one clock input to one bank of five and one bank of
four outputs
Separate output enable for each output bank
Output Skew < 250ps
Low jitter <200 ps cycle-to-cycle
IDT2309A-1 for Standard Drive
IDT2309A-1H for High Drive
No external RC network required
Operates at 3.3V V
DD
Available in SOIC and TSSOP packages
IDT2309A
3.3V ZERO DELAY
CLOCK BUFFER
DESCRIPTION:
The IDT2309A is a high-speed phase-lock loop (PLL) clock buffer,
designed to address high-speed clock distribution applications. The zero
delay is achieved by aligning the phase between the incomng clock and
the output clock, operable within the range of 10 to 133MHz.
The IDT2309A is a 16-pin version of the IDT2305A. The IDT2309A
accepts one reference input, and drives two banks of four low skew clocks.
The -1H version of this device operates up to 133MHz frequency and has
higher drive than the -1 device. All parts have on-chip PLLs which lock
to an input clock on the REF pin. The PLL feedback is on-chip and is
obtained fromthe CLKOUT pad. In the absence of an input clock, the
IDT2309A enters power down. In this mode, the device will draw less than
12μA for Commercial Temperature range and less than 25μA for Industrial
temperature range, and the outputs are tri-stated.
The IDT2309A is characterized for both Industrial and Commercial
operation.
PLL
S1
CLKA1
CLKA2
CLKA3
CLKA4
CLKB1
CLKB2
CLKB3
CLKB4
Control
Logic
1
REF
S2
16
CLKOUT
8
9
2
3
14
15
6
7
10
11
FUNCTIONAL BLOCK DIAGRAM
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| IDT2309NZ-1HDC | NINE OUTPUT 3.3V CLOCK BUFFER |
| IDT2309NZ-1HDCI | NINE OUTPUT 3.3V CLOCK BUFFER |
| IDT2309NZ-1HPG | NINE OUTPUT 3.3V CLOCK BUFFER |
| IDT2309NZ-1HPGG | NINE OUTPUT 3.3V CLOCK BUFFER |
相關代理商/技術參數 |
參數描述 |
|---|---|
| IDT2309A-1HPGGI8 | 功能描述:IC CLK BUFFER ZD HI DRV 16-TSSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發生器，PLL，頻率合成器 系列:- 標準包裝:2,000 系列:- 類型:PLL 時鐘發生器 PLL:帶旁路 輸入:LVCMOS，LVPECL 輸出:LVCMOS 電路數:1 比率 - 輸入:輸出:2:11 差分 - 輸入:輸出:是/無 頻率 - 最大:240MHz 除法器/乘法器:是/無 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應商設備封裝:32-TQFP（7x7） 包裝:帶卷 (TR) |
| IDT2309A-1HPGI | 功能描述:IC CLK BUFFER ZD HI DRV 16-TSSOP RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發生器，PLL，頻率合成器 系列:- 產品變化通告:Product Discontinuation 04/May/2011 標準包裝:96 系列:- 類型:時鐘倍頻器，零延遲緩沖器 PLL:帶旁路 輸入:LVTTL 輸出:LVTTL 電路數:1 比率 - 輸入:輸出:1:8 差分 - 輸入:輸出:無/無 頻率 - 最大:133.3MHz 除法器/乘法器:是/無 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:16-TSSOP 包裝:管件 其它名稱:23S08-5HPGG |
| IDT2309A-1HPGI8 | 功能描述:IC CLK BUFFER ZD HI DRV 16-TSSOP RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發生器，PLL，頻率合成器 系列:- 產品變化通告:Product Discontinuation 04/May/2011 標準包裝:96 系列:- 類型:時鐘倍頻器，零延遲緩沖器 PLL:帶旁路 輸入:LVTTL 輸出:LVTTL 電路數:1 比率 - 輸入:輸出:1:8 差分 - 輸入:輸出:無/無 頻率 - 最大:133.3MHz 除法器/乘法器:是/無 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:16-TSSOP 包裝:管件 其它名稱:23S08-5HPGG |
| IDT2309A-1PG | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:3.3V ZERO DELAY CLOCK BUFFER |
| IDT2309A-1PGG | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:3.3V ZERO DELAY CLOCK BUFFER |
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