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參數(shù)資料
| 型號： | IDT7008S20PFI |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | HIGH-SPEED 64K x 8 DUAL-PORT STATIC RAM |
| 中文描述： | 64K X 8 DUAL-PORT SRAM, 20 ns, PQFP100 |
| 封裝： | 14 X 14 MM, 1.40 MM HEIGHT, TQFP-100 |
| 文件頁數(shù)： | 1/19頁 |
| 文件大小： | 167K |
| 代理商： | IDT7008S20PFI |
1
2000 Integrated Device Technology, Inc.
DSC 3198/6
I/O
Control
Address
Decoder
64Kx8
MEMORY
ARRAY
7008
ARBITRATION
INTERRUPT
SEMAPHORE
LOGIC
CE
0L
CE
OE
L
R/
W
L
A
15L
A
0L
I/O
0-7L
SEM
L
INT
L
(2)
BUSY
L
(1,2)
R/
W
L
CE
0L
CE
1L
OE
L
I/O
Control
Address
Decoder
OE
R
R/
W
R
CE
0R
CE
A
15R
A
0R
I/O
0-7R
SEM
R
INT
R
(2)
R
BUSY
(1,2)
M/
S
(1)
R/
W
R
CE
0R
CE
1R
OE
R
3198 drw 01
1L
1R
16
16
N
IDT7008 easily expands data bus width to 16 bits or
more using the Master/Slave select when cascading more
than one device
N
M/
S
= V
IH
for
BUSY
output flag on Master,
M/
S
= V
IL
for
BUSY
input on Slave
N
Interrupt Flag
N
On-chip port arbitration logic
N
Full on-chip hardware support of semaphore signaling
between ports
N
Fully asynchronous operation from either port
N
TTL-compatible, single 5V (±10%) power supply
N
Available in 84-pin PGA, 84-pin PLCC, and a 100-pin TQFP
N
Industrial temperature range (–40°C to +85°C) is available
for selected speeds
N
True Dual-Ported memory cells which allow simultaneous
reads of the same memory location
N
High-speed access
– Mlitary: 25/35/55ns (max.)
– Industrial: 55ns (max.)
– Commercial: 20/25/35/55ns (max.)
N
Low-power operation
– IDT7008S
Active: 750mW (typ.)
Standby: 5mW (typ.)
– IDT7008L
Active: 750mW (typ.)
Standby: 1mW (typ.)
N
Dual chip enables allow for depth expansion without
external logic
HIGH-SPEED
64K x 8 DUAL-PORT
STATIC RAM
IDT7008S/L
NOTES:
1.
2.
BUSY
is an input as a Slave (M/
S
= V
IL
) and an output when it is a Master (M/
S
= V
IH
).
BUSY
and
INT
are non-tri-state totem-pole outputs (push-pull).
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