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參數(shù)資料
| 型號： | IDT7015S20PFI |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM |
| 中文描述： | 8K X 9 DUAL-PORT SRAM, 20 ns, PQFP80 |
| 封裝： | TQFP-80 |
| 文件頁數(shù)： | 1/20頁 |
| 文件大小： | 178K |
| 代理商： | IDT7015S20PFI |
1
2006 Integrated Device Technology, Inc.
APRIL 2006
DSC 2954/7
I/O
Control
Address
Decoder
MEMORY
ARRAY
ARBITRATION
INTERRUPT
SEMAPHORE
LOGIC
Address
Decoder
I/O
Control
R/
W
L
CE
L
OE
L
BUSY
L
A
12L
A
0L
2954 drw 01
I/O
0L
- I/O
8L
CE
L
OE
L
R/
W
L
SEM
L
INT
L
M/
S
BUSY
R
I/O
0R
-I/O
8R
A
12R
A
0R
SEM
R
INT
R
CE
R
OE
R
R/
W
R
(2)
(1,2)
(1,2)
(2)
R/
W
R
CE
R
OE
R
13
13
Func tional Bloc k Diagram
◆
M/
S
= V
IH
for
BUSY
output flag on Master
M/
S
= V
IL
for
BUSY
input on Slave
◆
Busy and Interrupt Flag
◆
On-chip port arbitration logic
◆
Full on-chip hardware support of semaphore signaling
between ports
◆
Fully asynchronous operation from either port
◆
TTL-compatible, single 5V (±10%) power supply
◆
Available in ceramic 68-pin PGA, 68-pin PLCC, and an 80-
pin TQFP
◆
Industrial temperature range (–40°C to +85°C) is available
for selected speeds
Features:
◆
True Dual-Ported memory cells which allow simultaneous
reads of the same memory location
◆
High-speed access
– Commercial: 12/15/17/20/25/35ns (max.)
– Industrial: 20ns (max.)
– Mlitary: 20/25/35ns (max.)
◆
Low-power operation
– IDT7015S
Active: 750mW (typ.)
Standby: 5mW (typ.)
– IDT7015L
Active: 750mW (typ.)
Standby: 1mW (typ.)
◆
IDT7015 easily expands data bus width to 18 bits or more
using the Master/Slave select when cascading more than
one device
HIGH-SPEED
8K x 9 DUAL-PORT
STATIC RAM
IDT7015S/L
NOTES:
1. In MASTER mode:
BUSY
is an output and is a push-pull driver
In SLAVE mode:
BUSY
is input.
2.
BUSY
outputs and
INT
outputs are non-tri-stated push-pull drivers.
◆
Green parts available, see ordering information
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