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參數(shù)資料
| 型號： | IDT70V7399S133BCI |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | HIGH-SPEED 3.3V 128K x 18 SYNCHRONOUS BANK-SWITCHABLE DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE |
| 中文描述： | 128K X 18 DUAL-PORT SRAM, 15 ns, PBGA256 |
| 封裝： | BGA-256 |
| 文件頁數(shù)： | 1/22頁 |
| 文件大小： | 488K |
| 代理商： | IDT70V7399S133BCI |
2002 Integrated Device Technology, Inc.
DECEMBER 2002
DSC 5630/6
1
Functional Block Diagram
Features:
N
128K x 18 Synchronous Bank-Switchable Dual-ported
SRAMArchitecture
–
64 independent 2K x 18 banks
– 2 megabits of memory on chip
N
Bank access controlled via bank address pins
N
High-speed data access
– Commercial: 3.4ns (200MHz)/3.6ns (166MHz)/
4.2ns (133MHz) (max.)
– Industrial: 3.6 (166MHz)/4.2ns (133MHz) (max.)
N
Selectable Pipelined or Flow-Through output mode
N
Counter enable and repeat features
N
Dual chip enables allow for depth expansion without
additional logic
N
Full synchronous operation on both ports
– 5ns cycle time, 200MHz operation (14Gbps bandwidth)
– Fast 3.4ns clock to data out
– 1.5ns setup to clock and 0.5ns hold on all control, data, and
address inputs @ 200MHz
– Data input, address, byte enable and control registers
– Self-timed write allows fast cycle time
N
Separate byte controls for multiplexed bus and bus
matching compatibility
N
LVTTL- compatible, 3.3V (±150mV) power supply
for core
N
LVTTL compatible, selectable 3.3V (±150mV) or 2.5V
(±100mV) power supply for I/Os and control signals on
each port
N
Industrial temperature range (-40°C to +85°C) is
available at 166MHz and 133MHz
N
Available in a 144-pin Thin Quad Flatpack (TQFP),
208-pin fine pitch Ball Grid Array (fpBGA), and 256-pin Ball
Grid Array (BGA)
N
Supports JTAG features compliant with IEEE 1149.1
– Due to limted pin count, JTAG is not supported on the
144-pin TQFP package.
HIGH-SPEED 3.3V 128K x 18
SYNCHRONOUS
BANK-SWITCHABLE
DUAL-PORT STATIC RAM
WITH 3.3V OR 2.5V INTERFACE
IDT70V7399S
2Kx18
MEMORY
ARRAY
(BANK 63)
MUX
MUX
PL/
FT
L
OPT
L
CLK
L
ADS
L
CNTEN
L
REPEAT
L
R/
W
L
CE
0L
CE
1L
UB
L
LB
L
OE
L
I/O
0L-17L
A
10L
A
0L
BA
5L
BA
4L
BA
3L
BA
2L
BA
1L
BA
0L
JTAG
2Kx18
MEMORY
ARRAY
(BANK 1)
MUX
MUX
2Kx18
MEMORY
ARRAY
(BANK 0)
MUX
MUX
CONTROL
LOGIC
I/O
CONTROL
BANK
DECODE
ADDRESS
DECODE
I/O
0R-17R
A
10R
A
0R
BA
5R
BA
4R
BA
3R
BA
2R
BA
1R
BA
0R
CONTROL
LOGIC
I/O
CONTROL
BANK
DECODE
ADDRESS
DECODE
5630 drw 01
,
PL/
FT
R
OPT
R
CLK
R
ADS
R
CNTEN
R
REPEAT
R
R/
W
R
CE
0R
CE
1R
UB
R
LB
R
OE
R
TMS
TCK
TRST
TDI
TDO
NOTE:
1. The Bank-Switchable dual-port uses a true SRAM
core instead of the traditional dual-port SRAMcore.
As a result, it has unique operating characteristics.
Please refer to the functional description on page 19
for details.
相關(guān)PDF資料 |
PDF描述 |
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| IDT70V7399S133BF | HIGH-SPEED 3.3V 128K x 18 SYNCHRONOUS BANK-SWITCHABLE DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE |
| IDT70V7399S133BFI | HIGH-SPEED 3.3V 128K x 18 SYNCHRONOUS BANK-SWITCHABLE DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE |
| IDT70V7399S133DD | HIGH-SPEED 3.3V 128K x 18 SYNCHRONOUS BANK-SWITCHABLE DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE |
| IDT70V7399S166DDI | HIGH-SPEED 3.3V 128K x 18 SYNCHRONOUS BANK-SWITCHABLE DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE |
| IDT70V7399S200BC | HIGH-SPEED 3.3V 128K x 18 SYNCHRONOUS BANK-SWITCHABLE DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE |
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| IDT70V7519S133BCI | 功能描述:IC SRAM 9MBIT 133MHZ 256BGA RoHS:否 類別:集成電路 (IC) >> 存儲器 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 格式 - 存儲器:EEPROMs - 串行 存儲器類型:EEPROM 存儲容量:8K (1K x 8) 速度:400kHz 接口:I²C，2 線串口 電源電壓:1.7 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:8-SOIC 包裝:帶卷 (TR) |
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