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參數資料
型號: IDT71256L150YB
廠商: Integrated Device Technology, Inc.
英文描述: CMOS STATIC RAM 256K (32K x 8-BIT)
中文描述: 的CMOS靜態RAM 256K(32K的× 8位)
文件頁數: 1/9頁
文件大小: 78K
代理商: IDT71256L150YB
Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
AUGUST 1996
1996 Integrated Device Technology, Inc.
DSC-2946/7
1
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FEATURES:
High-speed address/chip select time
— Military: 25/30/35/45/55/70/85/100/120/150ns (max.)
— Commercial: 20/25/35/45ns (max.) Low Power only.
Low-power operation
Battery Backup operation — 2V data retention
Produced with advanced high-performance CMOS
technology
Input and output directly TTL-compatible
Available in standard 28-pin (300 or 600 mil) ceramic
DIP, 28-pin (600 mil) plastic DIP, 28-pin (300 mil) SOJ
and 32-pin LCC
Military product compliant to MIL-STD-883, Class B
DESCRIPTION:
The IDT71256 is a 262,144-bit high-speed static RAM
organized as 32K x 8. It is fabricated using IDT’s high-
performance, high-reliability CMOS technology.
Address access times as fast as 20ns are available with
power consumption of only 350mW (typ.). The circuit also
offers a reduced power standby mode. When
CS
goes HIGH,
the circuit will automatically go to, and remain in, a low-power
standby mode as long as
CS
remains HIGH. In the full standby
mode, the low-power device consumes less than 15
μ
W,
typically. This capability provides significant system level
power and cooling savings. The low-power (L) version also
offers a battery backup data retention capability where the
circuit typically consumes only 5
μ
W when operating off a 2V
battery.
The lDT71256 is packaged in a 28-pin (300 or 600 mil)
ceramic DIP, a 28-pin 300 mil J-bend SOlC, and a 28-pin (600
mil) plastic DIP, and 32-pin LCC providing high board-level
packing densities.
The IDT71256 military RAM is manufactured in compliance
with the latest revision of MIL-STD-883, Class B, making it
ideally suited to military temperature applications demanding
the highest level of performance and reliability.
FUNCTIONAL BLOCK DIAGRAM
A
ADDRESS
DECODER
262,144 BIT
MEMORY ARRAY
I/O CONTROL
2946 drw 01
INPUT
DATA
CIRCUIT
WE
CS
OE
V
CC
GND
0
A
14
I/O
0
I/O
7
CONTROL
CIRCUIT
7.2
CMOS STATIC RAM
256K (32K x 8-BIT)
IDT71256S
IDT71256L
相關PDF資料
PDF描述
IDT71256SA12PZ CMOS STATIC RAM 256K (32K x 8-BIT)
IDT71256SA25TP CMOS STATIC RAM 256K (32K x 8-BIT)
IDT71256L100D CMOS STATIC RAM 256K (32K x 8-BIT)
IDT71256L100DB CMOS STATIC RAM 256K (32K x 8-BIT)
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相關代理商/技術參數
參數描述
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