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參數資料
| 型號： | IDT7188S70DB |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | CMOS STATIC RAM 64K 16K x 4-BIT |
| 中文描述： | 16K X 4 STANDARD SRAM, 70 ns, CDIP22 |
| 封裝： | 0.300 INCH, CERAMIC, DIP-22 |
| 文件頁數： | 1/8頁 |
| 文件大?。?/td> | 88K |
| 代理商： | IDT7188S70DB |
FEBRUARY 2001
DSC-2989/09
1
2000 Integrated Device Technology, Inc.
Features
N
High-speed (equal access and cycle times)
– Mlitary: 25/35/45/55/70/85ns (max.)
N
Low power consumption
N
Battery backup operation — 2V data retention
(L version only)
N
Available in high-density industry standard 22-pin, 300 mil
ceramic DIP
N
Produced with advanced CMOS technology
N
Inputs/outputs TTL-compatible
N
Mlitary product compliant to MIL-STD-883, Class B
Description
The IDT7188 is a 65,536-bit high-speed static RAMorganized as
16K x 4. It is fabricated using IDT’s high-performance, high-reliability
technology — CMOS. This state-of-the-art technology, combined with
Functional Block Diagram
A
0
DECODER
65,536-BIT
MEMORY ARRAY
COLUMN I/O
2989 drw 01
INPUT
DATA
CONTROL
WE
CS
GND
A
13
I/O
0
I/O
1
I/O
2
I/O
3
V
CC
,
innovative circuit design techniques, provides a cost effective approach
for memory intensive applications.
Access times as fast as 25ns are available. The IDT7188 offers a
reduced power standby mode, I
SB1
, which is activated when
CS
goes
HIGH. This capability significantly decreases power while enhancing
systemreliability. The low-power version (L) version also offers a battery
backup data retention capability where the circuit typically consumes only
30μW operating froma 2V battery.
All inputs and outputs are TTL-compatible and operate froma single
5V supply. The IDT7188 is packaged in a 22-pin, 300 ml ceramc DIP
providing excellent board-level packing densities.
Mlitary grade product is manufactured in compliance with the latest
revision of MIL-STD-883, Class B, making it ideally suited to mlitary
temperature applications demanding the highest level of performance
and reliability.
CMOS Static RAM
64K (16K x 4-Bit)
IDT7188S
IDT7188L
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