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參數資料
| 型號： | IDT7201LA80TPB |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | CMOS ASYNCHRONOUS FIFO 256 x 9, 512 x 9, 1K x 9 |
| 中文描述： | 512 X 9 OTHER FIFO, 80 ns, PDIP28 |
| 封裝： | PLASTIC, DIP-28 |
| 文件頁數： | 1/14頁 |
| 文件大小： | 152K |
| 代理商： | IDT7201LA80TPB |
Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DECEMBER 1996
1996 Integrated Device Technology, Inc.
DSC-2679/7
1
5.03
IDT7200L
IDT7201LA
IDT7202LA
CMOS ASYNCHRONOUS FIFO
256 x 9, 512 x 9, 1K x 9
W
WRITE
CONTROL
READ
CONTROL
R
FLAG
LOGIC
EXPANSION
LOGIC
XI
WRITE
POINTER
RAM
ARRAY
256 x 9
512 x 9
1024 x 9
READ
POINTER
DATA INPUTS
0
(D –D
8
)
RESET
LOGIC
THREE-
STATE
BUFFERS
DATA OUTPUTS
0
(Q –Q
8
)
EF
FF
XO
/
HF
RS
FL
/
RT
2679 drw 01
The IDT logo is a trademark of Integrated Device Technology, Inc.
FEATURES:
First-In/First-Out dual-port memory
256 x 9 organization (IDT7200)
512 x 9 organization (IDT7201)
1K x 9 organization (IDT7202)
Low power consumption
— Active: 770mW (max.)
—Power-down: 2.75mW (max.)
Ultra high speed—12ns access time
Asynchronous and simultaneous read and write
Fully expandable by both word depth and/or bit width
Pin and functionally compatible with 720X family
Status Flags: Empty, Half-Full, Full
Auto-retransmit capability
High-performance CEMOS
technology
Military product compliant to MIL-STD-883, Class B
Standard Military Drawing #5962-87531, 5962-89666,
5962-89863 and 5962-89536 are listed on this function
Industrial temperature range (-40oC to +85oC) is
available, tested to military electrical specifications
FUNCTIONAL BLOCK DIAGRAM
DESCRIPTION:
The IDT7200/7201/7202 are dual-port memories that load
and empty data on a first-in/first-out basis. The devices use
Full and Empty flags to prevent data overflow and underflow
and expansion logic to allow for unlimited expansion capability
in both word size and depth.
The reads and writes are internally sequential through the
use of ring pointers, with no address information required to
load and unload data. Data is toggled in and out of the devices
through the use of the Write (
W
) and Read (
R
) pins.
The devices utilizes a 9-bit wide data array to allow for
control and parity bits at the user’s option. This feature is
especially useful in data communications applications where
it is necessary to use a parity bit for transmission/reception
error checking. It also features a Retransmit (
RT
) capability
that allows for reset of the read pointer to its initial position
when
RT
is pulsed low to allow for retransmission from the
beginning of data. A Half-Full Flag is available in the single
device mode and width expansion modes.
The IDT7200/7201/7202 are fabricated using IDT’s high-
speed CMOS technology. They are designed for those
applications requiring asynchronous and simultaneous read/
writes in multiprocessing and rate buffer applications. Military
grade product is manufactured in compliance with the latest
revision of MIL-STD-883, Class B.
For latest information contact IDT's web site at www.idt.com or fax-on-demand at 408-492-8391.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| IDT7201S120CB | 制造商:Integrated Device Technology Inc 功能描述:FIFO, 512 x 9, Asynchronous, 28 Pin, Ceramic, DIP |
| IDT7201S120D | 制造商:Integrated Device Technology Inc 功能描述:FIFO, 512 x 9, Asynchronous, 28 Pin, Ceramic, DIP |
| Idt7201S120DB | 制造商:Integrated Device Technology Inc 功能描述:FIFO, 512 x 9, Asynchronous, 28 Pin, Ceramic, DIP |
| IDT7201SA35J | 制造商:Integrated Device Technology Inc 功能描述:FIFO, 512 x 9, Asynchronous, 32 Pin, Plastic, PLCC |
| IDT7201SA65J | 制造商:Integrated Device Technology Inc 功能描述: |
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