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參數資料
| 型號： | IDT7208L35PG |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | CMOS ASYNCHRONOUS FIFO |
| 中文描述： | 64K X 9 OTHER FIFO, 35 ns, PDIP28 |
| 封裝： | PLASTIC, DIP-28 |
| 文件頁數： | 1/14頁 |
| 文件大小： | 122K |
| 代理商： | IDT7208L35PG |
1
DSC-2661/15
2006 Integrated Device Technology, Inc. All rights reserved. Product subject to change without notice.
APRIL 2006
CMOS ASYNCHRONOUS FIFO
2,048 x 9, 4,096 x 9
8,192 x 9, 16,384 x 9
32,768 x 9 and 65,536 x 9
IDT7203
IDT7204
IDT7205
IDT7206
IDT7207
IDT7208
IDT and the IDT logo are trademarks of Integrated Device Technology, Inc.
COMMERCIAL, MILITARY AND INDUSTRIAL TEMPERATURE RANGES
FEATURES:
First-In/First-Out Dual-Port memory
2,048 x 9 organization (IDT7203)
4,096 x 9 organization (IDT7204)
8,192 x 9 organization (IDT7205)
16,384 x 9 organization (IDT7206)
32,768 x 9 organization (IDT7207)
65,636 x 9 organization (IDT7208)
High-speed: 12ns access time
Low power consumption
— Active: 660mW (max.)
— Power-down: 44mW (max.)
Asynchronous and simultaneous read and write
Fully expandable in both word depth and width
Pin and functionally compatible with IDT720X family
Status Flags: Empty, Half-Full, Full
Retransmit capability
High-performance CMOS technology
Mlitary product compliant to MIL-STD-883, Class B
Standard Mlitary Drawing for #5962-88669 (IDT7203), 5962-89567
(IDT7203), and 5962-89568 (IDT7204) are listed on this function
DESCRIPTION:
The IDT7203/7204/7205/7206/7207/7208 are dual-port memory buffers
with internal pointers that load and empty data on a first-in/first-out basis. The
device uses Full and Empty flags to prevent data overflow and underflow and
expansion logic to allow for unlimted expansion capability in both word size and
depth.
Data is toggled in and out of the device through the use of the Write (
W
) and
Read (
R
) pins.
The device's 9-bit width provides a bit for a control or parity at the users
option. It also features a Retransmt (
RT
) capability that allows the read pointer
to be reset to its initial position when
RT
is pulsed LOW. A Half-Full Flag is
available in the single device and width expansion modes.
These FIFOs are fabricated using IDT’s high-speed CMOS technology.
They are designed for applications requiring asynchronous and simultaneous
read/writes in multiprocessing, rate buffering and other applications.
Mlitary grade product is manufactured in compliance with the latest revision
of MIL-STD-883, Class B.
FUNCTIONAL BLOCK DIAGRAM
Industrial temperature range (–40
°
C to +85
°
C) is available
(plastic packages only)
Green parts available, see ordering information
W
WRITE
CONTROL
READ
CONTROL
R
FLAG
LOGIC
EXPANSION
LOGIC
XI
WRITE
POINTER
RAM ARRAY
2,048 x 9
4,096 x 9
8,192 x 9
16,384 x 9
32,768 x 9
65,536 x 9
READ
POINTER
DATA INPUTS
0
(D -D
8
)
RESET
LOGIC
THREE-
STATE
BUFFERS
DATA OUTPUTS
0
(Q Q
8
)
EF
FF
XO
/
HF
RS
FL
/
RT
2661 drw01
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相關代理商/技術參數 |
參數描述 |
|---|---|
| IDT72103L120D | 制造商:Integrated Device Technology Inc 功能描述:FIFO, 2K x 9, Asynchronous, 40 Pin, Ceramic, DIP |
| IDT72103S50P | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT72104S120P | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT72104S50D | 制造商:Integrated Device Technology Inc 功能描述: 制造商:Integrated Device Technology Inc 功能描述:4K X 9 OTHER FIFO, 50 ns, CDIP40 |
| IDT72104S50P | 制造商:IDT/89'S 功能描述:FIFO, 4K x 9, Asynchronous, 40 Pin, Plastic, DIP |
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