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參數(shù)資料
| 型號(hào)： | IDT72264L15G |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類(lèi)： | DRAM |
| 英文描述： | VARIABLE WIDTH SUPERSYNCO FIFO 8,192 x 18 or 16,384 x 9 16,384 x 18 or 32,768 x 9 |
| 中文描述： | 16K X 9 OTHER FIFO, CPGA68 |
| 封裝： | PGA-68 |
| 文件頁(yè)數(shù)： | 1/31頁(yè) |
| 文件大小： | 392K |
| 代理商： | IDT72264L15G |
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VARIABLE WIDTH SUPERSYNC
FIFO
8,192 x 18 or 16,384 x 9
16,384 x 18 or 32,768 x 9
COMMERCIAL TEMPERATURE RANGES
MAY 1997
1997 Integrated Device Technology, Inc
DSC-3218/2
1
Integrated Device Technology, Inc.
SyncFIFO is a trademark and the IDT logo is a registered trademark of Integrated Device Technology, Inc.
FUNCTIONAL BLOCK DIAGRAM
FEATURES:
Select 8192 x 18 or 16384x 9 organization (IDT72264)
Select 16384 x 18 or 32678 x 9 organization (IDT72274)
Flexible control of read and write clock frequencies
Reduced dynamic power dissipation
Auto power down minimizes power consumption
15 ns read/write cycle time (10 ns access time)
Retransmit Capability
Master Reset clears entire FIFO, Partial Reset clears
data, but retains programmable settings
Empty, full and half-full flags signal FIFO status
Programmable almost empty and almost full flags, each
flag can default to one of two preselected offsets
Program partial flags by either serial or parallel means
Select IDT Standard timing (using
EF
and
FF
flags) or
First Word Fall Through timing (using
OR
and
IR
flags)
Easily expandable in depth and width
Independent read and write clocks (permits simultaneous
reading and writing with one clock signal)
Available in the 64-pin Thin Quad Flat Pack (TQFP), 64-
pin Slim Thin Quad Flat Pack (STQFP) and the 68-pin
Pin Grid Array (PGA)
Output enable puts data outputs into high impedance
High-performance submicron CMOS technology
Industrial temperature range (-40
O
C to +85
O
C) is avail-
able, tested to military electrical specifications
DESCRIPTION:
The IDT72264/72274 are monolithic, CMOS, high capac-
ity, high speed, low power first-in, first-out (FIFO) memories
with clocked read and write controls. These FIFOs have three
main features that distinguish them among SuperSync FIFOs:
First, the data path width can be changed from 9-bits to 18-
bits; as a result, halving the depth. A pin called Memory Array
Select (MAC) chooses between the two options. This feature
helps reduce the need for redesigns or multiple versions of PC
cards, since a single layout can be used for both data bus
widths.
Second, IDT72264/72274 offer the greatest flexibility for
setting and varying the read and write clock (WCLK and
RCLK) frequencies. For example, given that the two clock
frequencies are unequal, the slower clock may exceed the
faster by, at most, twice its frequency. This feature is espe-
cially useful for communications and network applications
where clock frequencies are switched to permit different data
rates.
INPUT REGISTER
OUTPUT REGISTER
RAM ARRAY
8192 x 18 or 16384 x 9
16384 x 18 or 32768 x 9
FLAG
LOGIC
FF
/
IR
PAF
EF
/
OR
PAE
HF
FWFT/SI
READ POINTER
READ
CONTROL
LOGIC
WRITE CONTROL
LOGIC
WRITE POINTER
RESET
LOGIC
WEN
WCLK
D
0
-D
n
LD
MRS
REN
RCLK
OE
Q
0
-Q
n
TIMING
FS
OFFSET REGISTER
PRS
SEN
RT
3218 drw 01
MEMORY ARRAY
CONFIGURATION
MAC
IDT72264
IDT72274
For latest information contact IDT's web site at www.idt.com or fax-on-demand at 408-492-8391.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT72264L15PF | VARIABLE WIDTH SUPERSYNCO FIFO 8,192 x 18 or 16,384 x 9 16,384 x 18 or 32,768 x 9 |
| IDT72264L15TF | VARIABLE WIDTH SUPERSYNCO FIFO 8,192 x 18 or 16,384 x 9 16,384 x 18 or 32,768 x 9 |
| IDT72264L20PF | VARIABLE WIDTH SUPERSYNCO FIFO 8,192 x 18 or 16,384 x 9 16,384 x 18 or 32,768 x 9 |
| IDT72264L20TF | Bi-Directional Triode Thyristor Planar Silicon |
| IDT72264L20G | VARIABLE WIDTH SUPERSYNCO FIFO 8,192 x 18 or 16,384 x 9 16,384 x 18 or 32,768 x 9 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT72265LA10PF | 功能描述:IC FIFO 8KX18 LP 10NS 64QFP RoHS:否 類(lèi)別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲(chǔ)容量:288K（16K x 18） 數(shù)據(jù)速率:100MHz 訪問(wèn)時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類(lèi)型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（14x14） 包裝:托盤(pán) 其它名稱(chēng):72271LA10PF |
| IDT72265LA10PF8 | 功能描述:IC FIFO 8KX18 LP 10NS 64QFP RoHS:否 類(lèi)別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲(chǔ)容量:288K（16K x 18） 數(shù)據(jù)速率:100MHz 訪問(wèn)時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類(lèi)型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（14x14） 包裝:托盤(pán) 其它名稱(chēng):72271LA10PF |
| IDT72265LA10PFG | 功能描述:IC FIFO SUPERSYNC 8KX18 64QFP RoHS:是 類(lèi)別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:90 系列:74ABT 功能:同步，雙端口 存儲(chǔ)容量:4.6K（64 x 36 x2） 數(shù)據(jù)速率:67MHz 訪問(wèn)時(shí)間:- 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類(lèi)型:表面貼裝 封裝/外殼:120-LQFP 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:120-HLQFP（14x14） 包裝:托盤(pán) 產(chǎn)品目錄頁(yè)面:1005 (CN2011-ZH PDF) 其它名稱(chēng):296-3984 |
| IDT72265LA10TF | 功能描述:IC FIFO 8KX18 LP 10NS 64QFP RoHS:否 類(lèi)別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲(chǔ)容量:288K（16K x 18） 數(shù)據(jù)速率:100MHz 訪問(wèn)時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類(lèi)型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（14x14） 包裝:托盤(pán) 其它名稱(chēng):72271LA10PF |
| IDT72265LA10TF8 | 功能描述:IC FIFO 8KX18 LP 10NS 64QFP RoHS:否 類(lèi)別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲(chǔ)容量:288K（16K x 18） 數(shù)據(jù)速率:100MHz 訪問(wèn)時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類(lèi)型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（14x14） 包裝:托盤(pán) 其它名稱(chēng):72271LA10PF |
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