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參數(shù)資料
型號: IDT72361315PF
廠商: Integrated Device Technology, Inc.
英文描述: Single Low-Power Operational Amplifier 5-SOT-23 -40 to 85
中文描述: 先進先出的CMOS時鐘與巴士匹配和字節(jié)交換64 × 36
文件頁數(shù): 1/26頁
文件大小: 193K
代理商: IDT72361315PF
CMOS CLOCKED FIFO WITH
BUS-MATCHING AND
BYTE SWAPPING 64 x 36
2002 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.
DSC-3145/1
IDT723613
MARCH 2002
IDT and the IDT logo are registered trademarks of Integrated Device Technology Inc. SyncFIFO
is a trademark of Integrated Device Technology, Inc.
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
1
FEATURES:
Free-running CLKA and CLKB may be asynchronous or
coincident (permits simultaneous reading and writing of data on
a single clock edge)
64 x 36 storage capacity FIFO buffering data from Port A to
Port B
Mailbox bypass registers in each direction
Dynamic Port B bus sizing of 36 bits (long word), 18-bits (word),
and 9 bits (byte)
Selection of Big- or Little-Endian format for word and byte bus
sizes
Three modes of byte-order swapping on Port B
Programmable Almost-Full and Almost-Empty flags
Mcroprocessor interface control logic
FF
,
AF
flags synchronized by CLKA
EF
,
AE
flags synchronized by CLKB
Passive parity checking on each Port
Parity Generation can be selected for each Port
Supports clock frequencies up to 67 MHz
Fast access times of 10 ns
Available in 132-pin quad flatpack (PQFP) or space-saving
120-pin thin quad flatpack (TQFP)
Industrial temperature range (–40
°
C to +85
°
C) is available
DESCRIPTION:
The IDT723613 is a monolithic, high-speed, low-power, CMOS synchro-
nous (clocked) FIFO memory which supports clock frequencies up to 67 MHz
and has read-access times as fast as 10 ns. The 64 x 36 dual-port SRAMFIFO
buffers data fromport A to port B. The FIFO has flags to indicate empty and full
conditions, and two programmable flags, Almost-Full (
AF
) and Almost-Empty
(
AE
), to indicate when a selected number of words is stored in memory. FIFO
data on port B can be output in 36-bit, 18-bit, and 9-bit formats with a choice of
big- or Little-Endian configurations. Three modes of byte-order swapping are
possible with any bus-size selection. Communication between each port can
bypass the FIFO via two 36-bit mailbox registers. Each mailbox register has
a flag to signal when new mail has been stored. Parity is checked passively
FUNCTIONAL BLOCK DIAGRAM
Mail 2
Register
Mail 1
Register
I
R
O
R
64 x 36
Write
Pointer
Read
Pointer
Status Flag
Logic
CLKA
CSA
W/
R
A
ENA
MBA
Port-A
Control
Logic
Device
Control
RST
PEFA
MBF2
Port-B
Port-B
Logic
Logic
MBF1
PEFB
EF
AE
CLKB
CSB
W/
R
B
ENB
BE
SIZ0
SIZ1
SW0
SW1
36
B
0
- B
35
FF
AF
FS
0
FS
1
3145 drw01
Programmable
Flag Offset
Registers
A
0
- A
35
Parity
Gen/Check
P
G
FIFO
ODD/
EVEN
PGA
Parity
Gen/Check
PGB
36
RAM ARRAY
64 x 36
B
B
O
R
相關(guān)PDF資料
PDF描述
IDT72361315PFI Single Low-Power Operational Amplifier 5-SOT-23 -40 to 85
IDT72361315PQF CMOS Clocked FIFO With Bus Matching and Byte Swapping 64 x 36
IDT72361320PF High-Slew-Rate, Single-Supply Operational Amplifier 8-SOIC 0 to 70
IDT72361320PFI CMOS Clocked FIFO With Bus Matching and Byte Swapping 64 x 36
IDT72361320PQF CMOS Clocked FIFO With Bus Matching and Byte Swapping 64 x 36
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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IDT723613L15PQF 功能描述:IC CLOCKED FIFO 64X36 132-PQFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標準包裝:90 系列:7200 功能:同步 存儲容量:288K(16K x 18) 數(shù)據(jù)速率:100MHz 訪問時間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP(14x14) 包裝:托盤 其它名稱:72271LA10PF
IDT723613L20PF 功能描述:IC CLOCKED FIFO 64X36 120-TQFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標準包裝:15 系列:74F 功能:異步 存儲容量:256(64 x 4) 數(shù)據(jù)速率:- 訪問時間:- 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:24-DIP(0.300",7.62mm) 供應(yīng)商設(shè)備封裝:24-PDIP 包裝:管件 其它名稱:74F433
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