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參數資料
型號: IDT74FCT2533DTSOB
廠商: Integrated Device Technology, Inc.
英文描述: Ceramic Chip Capacitors / Standard X7R; Capacitance [nom]: 2.2uF; Working Voltage (Vdc)[max]: 50V; Capacitance Tolerance: +/-5%; Dielectric: Multilayer Ceramic; Temperature Coefficient: X7R; Lead Style: Surface Mount Chip; Lead Dimensions: 2225; Termination: Tin Plated Nickel Barrier; Body Dimensions: 0.220" x 0.248"; Container: Bulk; Features: Unmarked
中文描述: 快速CMOS八路透明鎖存
文件頁數: 1/8頁
文件大小: 182K
代理商: IDT74FCT2533DTSOB
Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
AUGUST 1995
1995 Integrated Device Technology, Inc.
6.12
DSC-4216/6
1
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
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LE
OE
FUNCTIONAL BLOCK DIAGRAM IDT54/74FCT373T/2373T AND IDT54/74FCT573T/2573T
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FUNCTIONAL BLOCK DIAGRAM IDT54/74FCT533T
2564 cnv* 02
2564 cnv* 01
IDT54/74FCT373T/AT/CT/DT - 2373T/AT/CT
IDT54/74FCT533T/AT/CT
IDT54/74FCT573T/AT/CT/DT - 2573T/AT/CT
FAST CMOS OCTAL
TRANSPARENT
LATCHES
FEATURES:
Common features:
Low input and output leakage
1
μ
A (max.)
CMOS power levels
True TTL input and output compatibility
– V
OH
= 3.3V (typ.)
– V
OL
= 0.3V (typ.)
Meets or exceeds JEDEC standard 18 specifications
Product available in Radiation Tolerant and Radiation
Enhanced versions
Military product compliant to MIL-STD-883, Class B
and DESC listed (dual marked)
Available in DIP, SOIC, SSOP, QSOP, CERPACK
and LCC packages
Features for FCT373T/FCT533T/FCT573T:
Std., A, C and D speed grades
High drive outputs (-15mA I
OH
, 48mA I
OL
)
Power off disable outputs permit “live insertion”
Features for FCT2373T/FCT2573T:
Std., A and C speed grades
Resistor output
(-15mA I
OH
, 12mA I
OL
Com.)
(-12mA I
OH
, 12mA I
OL
Mil.)
Reduced system switching noise
DESCRIPTION:
The FCT373T/FCT2373T, FCT533T and FCT573T/
FCT2573T are octal transparent latches built using an ad-
vanced dual metal CMOS technology. These octal latches
have 3-state outputs and are intended for bus oriented appli-
cations. The flip-flops appear transparent to the data when
Latch Enable (LE) is HIGH. When LE is LOW, the data that
meets the set-up time is latched. Data appears on the bus
when the Output Enable (
OE
) is LOW. When
OE
is HIGH, the
bus output is in the high- impedance state.
The FCT2373T and FCT2573T have balanced drive out-
puts with current limiting resistors. This offers low ground
bounce, minimal undershoot and controlled output fall times-
reducing the need for external series terminating resistors.
The FCT2xxxT parts are plug-in replacements for FCTxxxT
parts.
相關PDF資料
PDF描述
IDT74FCT2573ATDB FAST CMOS OCTAL TRANSPARENT LATCHES
IDT74FCT2573ATE FAST CMOS OCTAL TRANSPARENT LATCHES
IDT74FCT2573ATEB FAST CMOS OCTAL TRANSPARENT LATCHES
IDT74FCT2573ATL FAST CMOS OCTAL TRANSPARENT LATCHES
IDT74FCT2573ATLB FAST CMOS OCTAL TRANSPARENT LATCHES
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