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參數資料
| 型號： | IDT74LVC125APG |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | 3.3V CMOS QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O |
| 中文描述： | LVC/LCX/Z SERIES, QUAD 1-BIT DRIVER, TRUE OUTPUT, PDSO14 |
| 封裝： | TSSOP-14 |
| 文件頁數： | 1/6頁 |
| 文件大小： | 61K |
| 代理商： | IDT74LVC125APG |
INDUSTRIAL TEMPERATURE RANGE
IDT74LVC125A
3.3V CMOS QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS
1
FEBRUARY 2000
INDUS T RIAL T E MPE RAT URE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
2000 Integrated Device Technology, Inc.
DSC-4557/1
FEATURES:
0.5 MICRON CMOS Technology
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
V
CC
= 3.3V ± 0.3V, Normal Range
V
CC
= 2.7V to 3.6V, Extended Range
CMOS power levels (0.4
μ
W typ. static)
Rail-to-Rail output swing for increased noise margin
All inputs, outputs, and I/Os are 5V tolerant
Supports hot insertion
Available in SOIC, SSOP, and TSSOP packages
FUNCTIONAL BLOCK DIAGRAM
DRIV E FEATURES:
High Output Drivers: ±24mA
Reduced system switching noise
APPLICATIONS:
5V and 3.3V mixed voltage systems
Data communication and telecommunication systems
IDT74LVC125A
DESCRIPTION:
The LVC125A quadruple bus buffer gate is built using advanced dual
metal CMOS technology. The LVC125A features independent line drivers
with 3-state outputs. Each output is disabled when the associated output-
enable (
OE
) input is high.
To ensure the high impedance state during power up or power down,
OE
should be tied to Vcc through a pullup resistor; the mnimumvalue of the
resistor is determned by the current-sinking capability of the driver.
Inputs can be driven fromeither 3.3V or 5V devices. This feature allows
the use of this device as a translator in a mxed 3.3V/5V systemenvironment.
The LVC125A has been designed with a ±24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
3.3V CMOS QUADRUPLE
BUS BUFFER GATE
WITH 3-STATE OUTPUTS
AND 5 VOLT TOLERANT I/O
1
A
2
OE
1
2
4
5
3
6
1
Y
2
A
2
Y
3
A
4
OE
10
9
13
12
8
11
3
Y
4
A
4
Y
1
OE
3
OE
相關PDF資料 |
PDF描述 |
|---|---|
| IDT74LVC125A | Adjustable Precision Shunt Regulator 3-TO-92 -40 to 85 |
| IDT74LVC125APY | Adjustable Precision Shunt Regulator 3-TO-92 -40 to 85 |
| IDT74LVC125ADC | 3.3V CMOS QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O |
| IDT74LVC138A | 3.3V CMOS 3-LINE TO 8-LINE DECODER/DEMULTIPLEXER WITH 5 VOLT TOLERANT I/O |
| IDT74LVC157ADC | 3.3V CMOS QUAD 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER, 5 VOLT TOLERANT I/O |
相關代理商/技術參數 |
參數描述 |
|---|---|
| IDT74LVC138ADC | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT74LVC162244APA | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT74LVC162244APAG | 功能描述:IC BUFF DVR TRI-ST 16BIT 48TSSOP RoHS:是 類別:集成電路 (IC) >> 邏輯 - 緩沖器，驅動器，接收器，收發器 系列:74LVC 標準包裝:2,000 系列:74LVCH 邏輯類型:緩沖器/線路驅動器，非反相 元件數:2 每個元件的位元數:4 輸出電流高，低:24mA，24mA 電源電壓:1.65 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:20-SOIC 包裝:帶卷 (TR) |
| IDT74LVC162244APAG8 | 功能描述:IC BUFF DVR TRI-ST 16BIT 48TSSOP RoHS:是 類別:集成電路 (IC) >> 邏輯 - 緩沖器，驅動器，接收器，收發器 系列:74LVC 標準包裝:47 系列:74LVX 邏輯類型:緩沖器/線路驅動器，非反相 元件數:4 每個元件的位元數:1 輸出電流高，低:4mA，4mA 電源電壓:2 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:14-SOIC（0.209"，5.30mm 寬） 供應商設備封裝:14-SOIC 包裝:管件 |
| IDT74LVC162244APFG | 功能描述:IC BUFF DVR TRI-ST 16BIT 48TVSOP RoHS:是 類別:集成電路 (IC) >> 邏輯 - 緩沖器，驅動器，接收器，收發器 系列:74LVC 標準包裝:47 系列:74LVX 邏輯類型:緩沖器/線路驅動器，非反相 元件數:4 每個元件的位元數:1 輸出電流高，低:4mA，4mA 電源電壓:2 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:14-SOIC（0.209"，5.30mm 寬） 供應商設備封裝:14-SOIC 包裝:管件 |
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