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參數資料
型號: IDT74LVC16601A
廠商: Integrated Device Technology, Inc.
英文描述: 3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3 STATE OUTPUTS, 5 VOLT TOLERANT I/O
中文描述: 3.3V的CMOS 18位通用總線收發器和三態輸出,5伏的I / O
文件頁數: 1/6頁
文件大小: 79K
代理商: IDT74LVC16601A
INDUSTRIAL TEMPERATURE RANGE
IDT74LVC16601A
IDT74LVC16601A
3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER
1
J ANUARY 2004
INDUS T RIAL T E MPE RAT URE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
2004 Integrated Device Technology, Inc.
DSC-4599/3
FEATURES:
Typical t
SK(o)
(Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
V
CC
= 3.3V ± 0.3V, Normal Range
V
CC
= 2.7V to 3.6V, Extended Range
CMOS power levels (0.4
μ
W typ. static)
All inputs, outputs, and I/O are 5V tolerant
Supports hot insertion
Available in SSOP and TSSOP packages
FUNCTIONAL BLOCK DIAGRAM
APPLICATIONS:
5V and 3.3V mixed voltage systems
Data communication and telecommunication systems
DRIV E FEATURES:
High Output Drivers: ±24mA
Reduced system switching noise
DESCRIPTION:
The LVC16601A 18-bit universal bus transceiver is built using advanced
dual metal CMOS technology. This 18-bit universal bus transceiver com-
bines D-type latches and D-type flip-flops to allow data flow in transparent,
latched and clocked modes.
Data flow in each direction is controlled by output-enable (
OEAB
and
OEBA
), latch-enable (LEAB and LEBA), and clock (CLKAB and CLKBA)
inputs. The clock can be controlled by the clock-enable (
CLKENAB
and
CLKENBA
) inputs.
For A-to-B data flow, the device operates in the transparent mode when
LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at
a high or low logic level. If LEAB is low, the A-bus data is stored in the latch/
flip-flop on the LOW-to-HIGH transition of CLKAB. Output enable
OEAB
is
active low. When
OEAB
is low, the outputs are active. When
OEAB
is high,
the outputs are in the high-impedance state. Data flow for B to A is simlar
to that of A to B but uses
OEBA
, LEBA, CLKBA and
CLKENBA
.
All pins can be driven fromeither 3.3V or 5V devices. This feature allows
the use of this device as a translator in a mxed 3.3V/5V supply system
The LVC16601A has been designed with a ±24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
3.3V CMOS
18-BIT UNIVERSAL BUS
TRANSCEIVER WITH 3 STATE OUTPUTS,
5 VOLT TOLERANT I/O
CLKAB
B
1
OEAB
LEAB
LEBA
CLKENBA
54
1
56
55
2
28
30
29
27
3
CLKBA
OEBA
A
1
CLKENAB
CE
1D
C1
CLK
CE
1D
C1
CLK
TO 17 OTHER CHANNELS
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相關代理商/技術參數
參數描述
IDT74LVC16601APAG 功能描述:IC UNIV BUS TXRX 18BIT 56TSSOP RoHS:是 類別:集成電路 (IC) >> 邏輯 - 通用總線函數 系列:74LVC 產品變化通告:Product Discontinuation 09/Dec/2010 標準包裝:1,500 系列:74AVC 邏輯類型:通用總線驅動器 輸入數:- 電路數:18 位 輸出電流高,低:12mA,12mA 電源電壓:1.65 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:56-TFSOP(0.240",6.10mm 寬) 供應商設備封裝:56-TSSOP 包裝:帶卷 (TR)
IDT74LVC16601APAG8 功能描述:IC UNIV BUS TXRX 18BIT 56TSSOP RoHS:是 類別:集成電路 (IC) >> 邏輯 - 通用總線函數 系列:74LVC 產品變化通告:Product Discontinuation 09/Dec/2010 標準包裝:1,500 系列:74AVC 邏輯類型:通用總線驅動器 輸入數:- 電路數:18 位 輸出電流高,低:12mA,12mA 電源電壓:1.65 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:56-TFSOP(0.240",6.10mm 寬) 供應商設備封裝:56-TSSOP 包裝:帶卷 (TR)
IDT74LVC16601APVG 功能描述:IC UNIV BUS TXRX 18BIT 56SSOP RoHS:是 類別:集成電路 (IC) >> 邏輯 - 通用總線函數 系列:74LVC 產品變化通告:Product Discontinuation 09/Dec/2010 標準包裝:1,500 系列:74AVC 邏輯類型:通用總線驅動器 輸入數:- 電路數:18 位 輸出電流高,低:12mA,12mA 電源電壓:1.65 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:56-TFSOP(0.240",6.10mm 寬) 供應商設備封裝:56-TSSOP 包裝:帶卷 (TR)
IDT74LVC16601APVG8 功能描述:IC UNIV BUS TXRX 18BIT 56SSOP RoHS:是 類別:集成電路 (IC) >> 邏輯 - 通用總線函數 系列:74LVC 產品變化通告:Product Discontinuation 09/Dec/2010 標準包裝:1,500 系列:74AVC 邏輯類型:通用總線驅動器 輸入數:- 電路數:18 位 輸出電流高,低:12mA,12mA 電源電壓:1.65 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:56-TFSOP(0.240",6.10mm 寬) 供應商設備封裝:56-TSSOP 包裝:帶卷 (TR)
IDT74LVC16823APA 制造商:Integrated Device Technology Inc 功能描述:Flip Flop, 18-BIT, D Type, 56 Pin, Plastic, TSSOP
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