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參數資料
| 型號： | IDT74LVCH162374APVG |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數： | 1/6頁 |
| 文件大小： | 0K |
| 描述： | IC FLIP FLOP 16BIT D 3ST 48-SSOP |
| 標準包裝： | 30 |
| 系列： | 74LVCH |
| 功能： | 標準 |
| 類型： | D 型總線 |
| 輸出類型： | 三態非反相 |
| 元件數： | 2 |
| 每個元件的位元數： | 8 |
| 延遲時間 - 傳輸： | 2ns |
| 觸發器類型： | 正邊沿 |
| 輸出電流高，低： | 12mA，12mA |
| 電源電壓： | 2.3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-BSSOP（0.295"，7.50mm 寬） |
| 包裝： | 管件 |
| 其它名稱： | 74LVCH162374APVG |
INDUSTRIALTEMPERATURERANGE
IDT74LVCH162374A
3.3VCMOS16-BITEDGE-TRIGGEREDD-TYPEFLIP-FLOP
1
JUNE 2006
INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
2006 Integrated Device Technology, Inc.
DSC-4678/4
FEATURES:
Typical tSK(o) (Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
VCC = 3.3V ± 0.3V, Normal Range
VCC = 2.7V to 3.6V, Extended Range
CMOS power levels (0.4
μμμμμ W typ. static)
All inputs, outputs, and I/O are 5V tolerant
Available in SSOP and TSSOP packages
FUNCTIONAL BLOCK DIAGRAM
APPLICATIONS:
5V and 3.3V mixed voltage systems
Data communication and telecommunication systems
DRIVE FEATURES:
Balanced Output Drivers: ±12mA
Low switching noise
IDT74LVCH162374A
DESCRIPTION:
The LVCH162374A 16-bit edge-triggered D-type flip-flop is built using
advanced dual metal CMOS technology. This high-speed, low-power
register is ideal for use as a buffer register for data synchronization and
storage. The output enable (
OE) and clock (CLK) controls are organized
to operate each device as two 8-bit registers or one 16-bit register with
common clock. Flow-through organization of signal pins simplifies layout.
All inputs are designed with hysteresis for improved noise margin.
All pins of the LVCH162374A can be driven from either 3.3V or 5V
devices. This feature allows the use of this device as a translator in a mixed
3.3V/5V supply system.
The LVCH162374A has series resistors in the device output structure
which will significantly reduce line noise when used with light loads. This
driver has been developed to drive ±12mA at the designated thresholds.
The LVCH162374A has “bus-hold” which retains the inputs’ last state
whenever the input goes to a high impedance. This prevents floating inputs
and eliminates the need for pull-up/down resistors.
3.3V CMOS 16-BIT
EDGE TRIGGERED D-TYPE FLIP-
FLOP WITH 3-STATE OUTPUTS,
5 VOLT TOLERANT I/O, BUS-HOLD
1
OE
1D
C1
1
CLK
1
D1
1
Q1
TO SEVEN OTHER CHANNELS
2
OE
1D
C1
2
CLK
2
D1
2
Q1
1
48
47
2
24
25
36
13
TO SEVEN OTHER CHANNELS
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相關代理商/技術參數 |
參數描述 |
|---|---|
| IDT74LVCH162374APVG8 | 功能描述:IC FLIP FLOP 16BIT D 3ST 48-SSOP RoHS:是 類別:集成電路 (IC) >> 邏輯 - 觸發器 系列:74LVCH 標準包裝:1 系列:74LVX 功能:主復位 類型:D 型總線 輸出類型:非反相 元件數:1 每個元件的位元數:8 頻率 - 時鐘:150MHz 延遲時間 - 傳輸:7.1ns 觸發器類型:正邊沿 輸出電流高，低:4mA，4mA 電源電壓:2 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:20-TSSOP（0.173"，4.40mm 寬） 包裝:Digi-Reel® 其它名稱:74LVX273MTCXDKR |
| IDT74LVCH16244APA | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT74LVCH16244APAG | 功能描述:IC BUFF DVR TRI-ST 16BIT 48TSSOP RoHS:是 類別:集成電路 (IC) >> 邏輯 - 緩沖器，驅動器，接收器，收發器 系列:74LVCH 產品培訓模塊:Logic Packages 標準包裝:39 系列:74AVCH 邏輯類型:收發器，非反相 元件數:2 每個元件的位元數:8 輸出電流高，低:12mA，12mA 電源電壓:1.2 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TFSOP（0.240"，6.10mm 寬） 供應商設備封裝:48-TSSOP 包裝:管件 產品目錄頁面:831 (CN2011-ZH PDF) 其它名稱:568-2585-574AVCH16245DGG,512935266779512 |
| IDT74LVCH16244APAG8 | 功能描述:IC BUFF DVR TRI-ST 16BIT 48TSSOP RoHS:是 類別:集成電路 (IC) >> 邏輯 - 緩沖器，驅動器，接收器，收發器 系列:74LVCH 標準包裝:47 系列:74LVX 邏輯類型:緩沖器/線路驅動器，非反相 元件數:4 每個元件的位元數:1 輸出電流高，低:4mA，4mA 電源電壓:2 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:14-SOIC（0.209"，5.30mm 寬） 供應商設備封裝:14-SOIC 包裝:管件 |
| IDT74LVCH16244APV | 制造商:INTEGRATED DEVICE TECHNOLOGY 功能描述:74LVCH SMD 74LVCH16244 SSOP48 |
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