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參數資料
| 型號： | IDT88P8342BHGI |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數： | 1/98頁 |
| 文件大小： | 0K |
| 描述： | IC SPI3-SPI4 EXCHANGE 820-PBGA |
| 標準包裝： | 24 |
| 系列： | * |
| 其它名稱： | 88P8342BHGI |
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2006 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.
DSC-6371/9
APRIL 2006
SPI EXCHANGE 2 x SPI-3 TO SPI-4
Issue 1.0
IDT and the IDT logo are trademarks of Integrated Device Technology, Inc
INDUSTRIAL TEMPERATURE RANGE
IDT88P8342
FEATURES
Functionality
- Low speed to high speed SPI exchange device
- Logical port (LP) mapping (SPI-3 <-> SPI-4) tables per direction
- Per LP configurable memory allocation
- Maskable interrupts for fatal errors
- Fragment and burst length configurable per interface: min 16 bytes,
max 256 bytes
Standard Interfaces
- Two OIF SPI-3: 8 or 32 bit, 19.44-133 MHz, 256 address range, 64
concurrently active LPs per interface
- One OIF SPI-4 phase 2: 80 - 400 MHz, 256 address range, 128
concurrently active LPs
- SPI-4 FIFO status channel options:
LVDS full-rate
LVTTL eighth-rate
- Compatible with Network Processor Streaming Interface (NPSI)
NPE-Framer mode of operation
- SPI-4 ingress LVDS automatic bit alignment and lane de-skew over
the entire frequency range
- SPI-4 egress LVDS programmable lane pre-skew 0.1 to 0.3 cycle
- IEEE 1149.1 JTAG
- Serial or parallel microprocessor interface for control and monitoring
Full Suite of Performance Monitoring Counters
- Number of packets
- Number of fragments
- Number of errors
- Number of bytes
Green parts available, see ordering information
APPLICATIONS
Ethernet transport
SONET / SDH packet transport line cards
Broadband aggregation
Multi-service switches
IP services equipment
DESCRIPTION
TheIDT88P8342isaSPI(SystemPacketInterface)ExchangewithtwoSPI-
3 interfaces and one SPI-4 interface. The data that enter on the low speed
interface (SPI-3) are mapped to logical identifiers (LIDs) and enqueued for
transmission over the high speed interface (SPI-4). The data that enter on the
high speed interface (SPI-4) are mapped to logical identifiers (LIDs) and
enqueued for transmission over a low speed interface (SPI-3). A data flow
betweenSPI-3andSPI-4interfacesisaccomplishedwithLIDmaps.Thelogical
port addresses and number of entries in the LID maps may be dynamically
configured. Various parameters of a data flow may be configured by the user
such as buffer memory size and watermarks. In a typical application, the
IDT88P8342 enables connection of two SPI-3 devices to a SPI-4 network
processor. In other applications a SPI-3 or SPI-4 device may be connected to
a SPI-3 network processor or traffic manager.
FUNCTIONAL BLOCK DIAGRAM
6371 drw01
JTAG IF
Control Path
Data Path
Uproc IF
Clock Generator
PFP = Packet Fragment Processor
SPI-3 A
64 Logical Ports
SPI-3 B
64 Logical Ports
SPI-4
128 Logical
Ports
SPI-3 to SPI-4 PFP
SPI-4 to SPI-3 PFP
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相關代理商/技術參數 |
參數描述 |
|---|---|
| IDT88P8342BHI | 功能描述:IC SPI3-SPI4 EXCHANGE 820-PBGA RoHS:否 類別:集成電路 (IC) >> 專用 IC 系列:* 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1 系列:- 類型:調幀器 應用:數據傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應商設備封裝:400-PBGA（27x27） 包裝:散裝 |
| IDT88P8344 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:SPI EXCHANGE 4 x SPI-3 TO SPI-4 Issue 1.0 |
| IDT88P8344BHGI | 功能描述:IC SPI3-SPI4 EXCHANGE 820-PBGA RoHS:是 類別:集成電路 (IC) >> 專用 IC 系列:* 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1 系列:- 類型:調幀器 應用:數據傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應商設備封裝:400-PBGA（27x27） 包裝:散裝 |
| IDT88P8344BHI | 功能描述:IC SPI3-SPI4 EXCHANGE 820-PBGA RoHS:否 類別:集成電路 (IC) >> 專用 IC 系列:* 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1 系列:- 類型:調幀器 應用:數據傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應商設備封裝:400-PBGA（27x27） 包裝:散裝 |
| IDT89H10T4BG2ZBBC | 制造商:Integrated Device Technology Inc 功能描述:IC PCI SW 10LANE 4PORT 324BGA |
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