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參數資料
| 型號： | IDT950405AFLFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產生/分配 |
| 英文描述： | 300 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | 0.300 INCH, GREEN, MO-118, SSOP-48 |
| 文件頁數： | 1/18頁 |
| 文件大小： | 219K |
| 代理商： | IDT950405AFLFT |
Integrated
Circuit
Systems, Inc.
ICS950405
0802F—04/22/05
Functionality
Recommended Application:
AMD K8 System Clock with AMD, VIA or ALI Chipset
Output Features:
2 - Differential pair push-pull CPU clocks @
3.3V
9 - PCICLK (Including 1 free running) @ 3.3V
3 - Selectable PCICLK/HTTCLK @ 3.3V
1 - HTTCLK @ 3.3V
1 - 48MHz @ 3.3V fixed.
1 - 24/48MHz @ 3.3V
3 - REF @ 3.3V, 14.318MHz.
AMD - K8 System Clock Chip
CPU
HTT
PCI
MHz
0
100.90
67.27
33.63
0
1
133.90
66.95
33.48
0
1
0
168.00
67.20
33.60
0
1
202.00
67.33
33.67
0
1
0
100.20
66.80
33.40
0
1
0
1
133.50
66.75
33.38
0
1
0
166.70
66.68
33.34
0
1
200.40
66.80
33.40
1
0
150.00
60.00
30.00
1
0
1
180.00
60.00
30.00
1
0
1
0
210.00
70.00
35.00
1
0
1
240.00
60.00
30.00
1
0
270.00
67.50
33.75
1
0
1
233.33
66.67
33.33
1
0
266.67
66.67
33.33
1
300.00
75.00
37.50
FS0
FS3
FS2
FS1
Pin Configuration
*FS0/REF0 1
48 REF1/FS1*
VDDHTT 2
47 GND
X1 3
46 VDDREF
X2 4
45 REF2/FS2*
GND 5
44 Reset#
*ModeA/HTTCLK0 6
43 VDDA
*ModeB/PCICLK8/HTTCLK1 7
42 GND
PCICLK9/HTTCLK2 8
41 CPUCLK8T0
VDDPCI 9
40 CPUCLK8C0
GND 10
39 GND
PCICLK11/HTTCLK3 11
38 VDDCPU
PCICLK10 12
37 CPUCLK8T1
PCICLK013
36CPUCLK8C1
PCICLK114
35VDDCPU
GND 15
34 GND
VDDPCI 16
33 GND
PCICLK217
32PD#*
PCICLK3 18
31 48MHz/FS3**
VDDPCI 19
30 GND
GND 20
29 AVDD48
2XPCICLK4 21
28 24_48MHz/Sel24_48#*
2XPCICLK5 22
27 GND
2XPCICLK6 23
26 SDATA
2XPCICLK7 24
25 SCLK
48-SSOP
* Internal Pull-Up Resistor
IC
S9
50
405
2X This Output has 2X Default Drive and can be programmaed lower via IIC
Features:
Programmable output frequency.
Programmable output divider ratios.
Programmable output rise/fall time.
Programmable output skew.
Programmable spread percentage for EMI control.
Watchdog timer technology and RESET# output to
reset system
if system malfunctions.
Programmable watch dog safe frequency.
Support I
2C Index read/write and block read/write
operations.
Uses external 14.318MHz crystal.
Supports Hyper Transport Technology (HTTCLK).
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