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參數(shù)資料
| 型號： | IDTTSE2002B3CNRG |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 26/30頁 |
| 文件大小： | 423K |
| 描述： | IC TEMP SENS EEPROM DFN-8 |
| 標準包裝： | 120 |
| 功能： | 溫度監(jiān)控系統(tǒng)（傳感器） |
| 傳感器類型： | 內(nèi)部 |
| 感應溫度： | -20°C ~ 125°C |
| 精確度： | ±1°C（最小值） |
| 拓撲： | ADC（三角積分型），控制邏輯，寄存器庫 |
| 輸出類型： | 2 線串行，I²C?/SMBUS? |
| 輸出警報： | 無 |
| 輸出風扇： | 無 |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | -20°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-VFDFN 裸露焊盤 |
| 供應商設備封裝： | 8-VFQFPN（2x3） |
| 包裝： | 管件 |
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26 of 30
May 12, 2010
IDT Confidential
'0' (default); The EVENT
pin is active low. The active state of the pin will be logical '0'.
'1'; The EVENT
pin is active high. The active state of the pin will be logical '1'.
Bit 0 EVENT_MODE; Controls the behavior of the EVENT
pin. The EVENT
pin may function in either comparator or interrupt mode.
'0'; The EVENT
pin will function in comparator mode.
'1'; The EVENT
pin will function in interrupt mode.
Temperature Register Value Definitions
Temperatures in the High Limit Register, Low Limit Register, TCRIT Register, and Temperature Data Register are expressed in two's complement
format. Bits B 12 through B2 for each of these registers are defined for all device resolutions as defined in the TRES field of the Capabilities Register,
hence a 0.25癈 minimum granularity is supported in all registers. Examples of valid settings and interpretation of temperature register bits:
The TRES field of the Capabilities Register optionally defines higher resolution devices. For compatibility and simplicity, this additional resolution
affects only the Temperature Data Register but none of the Limit Registers. When higher resolution devices generate status or EVENT
changes, only
bits B12 through B2 are used in the comparison; however, all 11 bits (TRES[1-0] = 10) or all 12 bits (TRES[1-0] = 11) are visible in reads from the
Temperature Data Register.
When a lower resolution device is indicated in the Capabilities Register (TRES[1-0] = 00), the finest resolution supported is 0.5癈. When this is
detected, bit 2 of all Limit Registers should be programmed to 0 to assure correct operation of the temperature comparators.
High Limit Register
The temperature limit registers (High, Low, and TCRIT) define the temperatures to be used by various on-chip comparators to determine device
temperature status and thermal EVENTs. For future compatibility, unused bits - must be programmed as 0.
High Limit Register
The High Limit Register holds the High Limit for the nominal operating window. When the temperature rises above the High Limit, or drops below or
equal to the High Limit, then the EVENT
pin is asserted (if enabled). If the EVENT_LOCK bit is set as shown in the Configuration Register table), then
this register becomes read-only.
Temperature Register Coding Examples
B15~B0 (binary)
Value
Units
xxx0 0000 0010 11xx
+2.75
癈
xxx0 0000 0001 00xx
+1.00
癈
xxx0 0000 0000 01xx
+0.25
癈
xxx0 0000 0000 00xx
0
癈
xxx1 1111 1111 11xx
-0.25
癈
xxx1 1111 1111 00xx
-1.00
癈
xxx1 1111 1101 01xx
-2.75
癈
ADDR R/W B15/B7 B14/B6 B13/B5 B12/B4 B11/B3
B10/B2
B9/B1
B8/B0
Default
02
R/W
Sign
128
64
32
16
0000
8
4
2
1
0.5
0.25
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| IDTTSE2002B3CNRG8 | 功能描述:IC TEMP SENS EEPROM DFN-8 RoHS:是 類別:集成電路 (IC) >> PMIC - 熱管理 系列:- 標準包裝:3,000 系列:- 功能:溫度開關 傳感器類型:內(nèi)部 感應溫度:85°C 分界點 精確度:±6°C（最小值） 拓撲:ADC（三角積分型），比較器，寄存器庫 輸出類型:開路漏極 輸出警報:是 輸出風扇:是 電源電壓:2.7 V ~ 5.5 V 工作溫度:-55°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:SC-74A，SOT-753 供應商設備封裝:SOT-23-5 包裝:帶卷 (TR) 其它名稱:ADT6501SRJZP085RL7-ND |
| IDTTSE2002GB2A1NCG | 制造商:Integrated Device Technology Inc 功能描述:IC TEMP SENS EEPROM DFN-8 |
| IDTTSE2002GB2A1NCG8 | 制造商:Integrated Device Technology Inc 功能描述:IC TEMP SENS EEPROM DFN-8 |
| IDTTSE2002GB2A1NRG | 制造商:Integrated Device Technology Inc 功能描述:IC TEMP SENS EEPROM DFN-8 |
| IDTTSE2002GB2A1NRG8 | 制造商:Integrated Device Technology Inc 功能描述:IC TEMP SENS EEPROM DFN-8 |
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